/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 126 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ macro 127 #define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD)))
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 126 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ macro 127 #define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD)))
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 126 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ macro 127 #define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD)))
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 1750 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 1755 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 1759 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 1750 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 1755 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 1759 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 1750 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 1755 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 1759 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/ |
H A D | lcd.h | 196 #define LCCR3_PCD(x) bits_val(7,0,x) macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/ |
H A D | SA-1100.h | 2781 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ macro 2786 (((Div) - 4)/2 << FShft (LCCR3_PCD)) 2790 (((Div) - 3)/2 << FShft (LCCR3_PCD))
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