| /dports/devel/directfb/DirectFB-1.4.17/gfxdrivers/pxa3xx/ |
| H A D | pxa3xx_regs.h | 78 #define LDCMD0 (PXA3XX_LCD_BASE + 0x020C) macro
|
| /dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/ |
| H A D | lcd.h | 98 #define LDCMD0 LCD_pointer->ldcmd0 macro
|
| /dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/ |
| H A D | pxa255regs.h | 989 #define LDCMD0 __REG(LCD_BASE+0x020c) /* DMA Channel 0 Command Register */ macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2106 #define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */
|