/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load 2 from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/GlobalISel/ |
H A D | select-ldxr-intrin.mir | 44 ; CHECK: [[LDXRH:%[0-9]+]]:gpr32 = LDXRH [[COPY]] :: (volatile load (s16) from %ir.addr) 45 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDXRH]], %subreg.sub_32
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
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/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/AArch64/ |
H A D | AArch64InstrAtomics.td | 225 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 233 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
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/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/AArch64/ |
H A D | AArch64InstrAtomics.td | 225 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 233 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 232 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>; 240 (SUBREG_TO_REG (i64 0), (LDXRH GPR64sp:$addr), sub_32)>;
|