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Searched refs:LD_SHIFT (Results 1 – 25 of 65) sorted by relevance

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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/cpu/armv7/bcm281xx/
H A Dreset.c14 #define LD_SHIFT 0 /* Reload value shift */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()

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