/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 macro 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); in cn7xxx_lmc_ddr3_reset() 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset() 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); in perform_lmc_reset()
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/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 80 #define LMC_DDR3_RESET_DEASSERT 1 97 LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); 166 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT); 171 cn7xxx_lmc_ddr3_reset(priv, if_num, LMC_DDR3_RESET_DEASSERT);
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