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Searched refs:LPCR_HDICE (Results 1 – 25 of 39) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/kvm/
H A Dbook3s_hv_interrupts.S67 ori r8, r9, LPCR_HDICE
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/kvm/
H A Dbook3s_hv_interrupts.S67 ori r8, r9, LPCR_HDICE
/dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/kvm/
H A Dbook3s_hv_interrupts.S67 ori r8, r9, LPCR_HDICE
/dports/emulators/qemu42/qemu-4.2.1/target/ppc/
H A Dmmu-hash64.c1124 LPCR_RMI | LPCR_HDICE); in ppc_store_lpcr()
1131 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE); in ppc_store_lpcr()
1138 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE); in ppc_store_lpcr()
1146 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE); in ppc_store_lpcr()
H A Dexcp_helper.c830 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
/dports/emulators/qemu-utils/qemu-4.2.1/target/ppc/
H A Dmmu-hash64.c1124 LPCR_RMI | LPCR_HDICE); in ppc_store_lpcr()
1131 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE); in ppc_store_lpcr()
1138 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE); in ppc_store_lpcr()
1146 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE); in ppc_store_lpcr()
H A Dexcp_helper.c830 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/
H A Dmmu-hash64.c1092 LPCR_RMI | LPCR_HDICE); in ppc_store_lpcr()
1099 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE); in ppc_store_lpcr()
1106 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE); in ppc_store_lpcr()
1114 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE); in ppc_store_lpcr()
H A Dexcp_helper.c803 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/kernel/
H A Dcpu_setup_power.c35 lpcr &= ~LPCR_HDICE; /* clear HDICE */ in init_LPCR_ISA300()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/kernel/
H A Dcpu_setup_power.c35 lpcr &= ~LPCR_HDICE; /* clear HDICE */ in init_LPCR_ISA300()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/kernel/
H A Dcpu_setup_power.c35 lpcr &= ~LPCR_HDICE; /* clear HDICE */ in init_LPCR_ISA300()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/include/asm/
H A Dreg.h469 #define LPCR_HDICE ASM_CONST(0x0000000000000001) /* Hyp Decr enable (HV,PR,EE) */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/include/asm/
H A Dreg.h469 #define LPCR_HDICE ASM_CONST(0x0000000000000001) /* Hyp Decr enable (HV,PR,EE) */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/include/asm/
H A Dreg.h469 #define LPCR_HDICE ASM_CONST(0x0000000000000001) /* Hyp Decr enable (HV,PR,EE) */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/ppc/
H A Dexcp_helper.c851 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
H A Dtranslate_init.inc.c8480 LPCR_RMI | LPCR_HDICE; in POWERPC_FAMILY()
8623 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE; in POWERPC_FAMILY()
8799 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE; in POWERPC_FAMILY()
9016 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
9233 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/
H A Dexcp_helper.c851 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
H A Dtranslate_init.inc.c8480 LPCR_RMI | LPCR_HDICE; in POWERPC_FAMILY()
8623 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE; in POWERPC_FAMILY()
8799 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE; in POWERPC_FAMILY()
9016 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
9233 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
/dports/emulators/qemu5/qemu-5.2.0/target/ppc/
H A Dexcp_helper.c914 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/ppc/
H A Dexcp_helper.c961 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
H A Dcpu_init.c7530 LPCR_RMI | LPCR_HDICE;
7672 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE;
7846 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE;
8061 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE;
8271 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE;
/dports/emulators/qemu/qemu-6.2.0/target/ppc/
H A Dexcp_helper.c955 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()
H A Dcpu_init.c7530 LPCR_RMI | LPCR_HDICE; in POWERPC_FAMILY()
7672 LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE; in POWERPC_FAMILY()
7846 LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE; in POWERPC_FAMILY()
8061 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
8271 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
/dports/emulators/qemu60/qemu-6.0.0/target/ppc/
H A Dexcp_helper.c914 bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE); in ppc_hw_interrupt()

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