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Searched refs:LPDDR3 (Results 1 – 25 of 1199) sorted by relevance

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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c128 case LPDDR3: in get_dram_drv_odt_val()
201 case LPDDR3: in sdram_timing_cfg_init()
269 } else if (dram_type == LPDDR3) { in get_rdlat_adj()
294 } else if (dram_type == LPDDR3) { in get_wrlat_adj()
365 if (timing_config->dram_type == LPDDR3) { in get_pi_wrlat()
454 if (timing_config->dram_type == LPDDR3) in get_pi_todtoff_min()
1051 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1068 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1229 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
1245 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
[all …]
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c128 case LPDDR3: in get_dram_drv_odt_val()
201 case LPDDR3: in sdram_timing_cfg_init()
269 } else if (dram_type == LPDDR3) { in get_rdlat_adj()
294 } else if (dram_type == LPDDR3) { in get_wrlat_adj()
365 if (timing_config->dram_type == LPDDR3) { in get_pi_wrlat()
454 if (timing_config->dram_type == LPDDR3) in get_pi_todtoff_min()
1051 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1068 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1229 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
1245 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
[all …]
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c128 case LPDDR3: in get_dram_drv_odt_val()
201 case LPDDR3: in sdram_timing_cfg_init()
269 } else if (dram_type == LPDDR3) { in get_rdlat_adj()
294 } else if (dram_type == LPDDR3) { in get_wrlat_adj()
365 if (timing_config->dram_type == LPDDR3) { in get_pi_wrlat()
454 if (timing_config->dram_type == LPDDR3) in get_pi_todtoff_min()
1051 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1068 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1229 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
1245 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
[all …]
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c128 case LPDDR3: in get_dram_drv_odt_val()
201 case LPDDR3: in sdram_timing_cfg_init()
269 } else if (dram_type == LPDDR3) { in get_rdlat_adj()
294 } else if (dram_type == LPDDR3) { in get_wrlat_adj()
365 if (timing_config->dram_type == LPDDR3) { in get_pi_wrlat()
454 if (timing_config->dram_type == LPDDR3) in get_pi_todtoff_min()
1051 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1068 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1229 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
1245 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
[all …]
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c128 case LPDDR3: in get_dram_drv_odt_val()
201 case LPDDR3: in sdram_timing_cfg_init()
269 } else if (dram_type == LPDDR3) { in get_rdlat_adj()
294 } else if (dram_type == LPDDR3) { in get_wrlat_adj()
365 if (timing_config->dram_type == LPDDR3) { in get_pi_wrlat()
454 if (timing_config->dram_type == LPDDR3) in get_pi_todtoff_min()
1051 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1068 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f0()
1229 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
1245 if (timing_config->dram_type == LPDDR3) { in gen_rk3399_pi_params_f1()
[all …]
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ram/rockchip/
H A DKconfig40 bool "LPDDR3 support for Rockchip PX30"
43 This enables LPDDR3 sdram support instead of the default DDR3 support

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