| /dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/ |
| H A D | decode2.h | 48 , M32R2F_INSN_DIV, M32R2F_INSN_DIVU, M32R2F_INSN_REM, M32R2F_INSN_REMU enumerator
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| H A D | decode2.c | 93 { M32R_INSN_REM, M32R2F_INSN_REM, M32R2F_SFMT_DIV, NOPAR, NOPAR },
607 { itype = M32R2F_INSN_REM; goto extract_sfmt_div; } in m32r2f_decode()
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| H A D | model2.c | 3087 { M32R2F_INSN_REM, model_m32r2_rem, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
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| H A D | sem2-switch.c | 81 { M32R2F_INSN_REM, && case_sem_INSN_REM },
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| /dports/devel/gdb761/gdb-7.6.1/sim/m32r/ |
| H A D | decode2.h | 47 , M32R2F_INSN_DIV, M32R2F_INSN_DIVU, M32R2F_INSN_REM, M32R2F_INSN_REMU enumerator
|
| H A D | decode2.c | 92 { M32R_INSN_REM, M32R2F_INSN_REM, M32R2F_SFMT_DIV, NOPAR, NOPAR },
606 { itype = M32R2F_INSN_REM; goto extract_sfmt_div; } in m32r2f_decode()
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| H A D | model2.c | 3086 { M32R2F_INSN_REM, model_m32r2_rem, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
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| H A D | sem2-switch.c | 80 { M32R2F_INSN_REM, && case_sem_INSN_REM },
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| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | decode2.h | 48 , M32R2F_INSN_DIV, M32R2F_INSN_DIVU, M32R2F_INSN_REM, M32R2F_INSN_REMU enumerator
|
| H A D | decode2.c | 93 { M32R_INSN_REM, M32R2F_INSN_REM, M32R2F_SFMT_DIV, NOPAR, NOPAR },
520 case 0 : itype = M32R2F_INSN_REM; goto extract_sfmt_div;
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| H A D | model2.c | 3087 { M32R2F_INSN_REM, model_m32r2_rem, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
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| H A D | sem2-switch.c | 81 { M32R2F_INSN_REM, && case_sem_INSN_REM },
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| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | decode2.h | 48 , M32R2F_INSN_DIV, M32R2F_INSN_DIVU, M32R2F_INSN_REM, M32R2F_INSN_REMU enumerator
|
| H A D | decode2.c | 93 { M32R_INSN_REM, M32R2F_INSN_REM, M32R2F_SFMT_DIV, NOPAR, NOPAR },
520 case 0 : itype = M32R2F_INSN_REM; goto extract_sfmt_div; in m32r2f_decode()
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| H A D | model2.c | 3087 { M32R2F_INSN_REM, model_m32r2_rem, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
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| H A D | sem2-switch.c | 81 { M32R2F_INSN_REM, && case_sem_INSN_REM },
|