/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/ |
H A D | m32r-desc.c | 268 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 323 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 327 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 339 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 147 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
H A D | m32r-desc.c | 269 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 324 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 328 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 152 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
H A D | m32r-desc.c | 268 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 323 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 327 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 339 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 147 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/ |
H A D | m32r-desc.c | 268 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 323 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 327 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 339 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 147 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/gdb/gdb-11.1/opcodes/ |
H A D | m32r-desc.c | 269 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 324 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 328 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 152 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/gdb761/gdb-7.6.1/opcodes/ |
H A D | m32r-desc.c | 268 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 323 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 327 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 339 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 147 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
H A D | m32r-desc.c | 277 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 344 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 356 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 141 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
H A D | m32r-desc.c | 269 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 324 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 328 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 152 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | m32r-desc.c | 277 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 344 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 356 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 143 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
H A D | m32r-desc.c | 277 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 344 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 356 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 143 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
H A D | m32r-desc.c | 277 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 344 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 356 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 153 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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/dports/devel/binutils/binutils-2.37/opcodes/ |
H A D | m32r-desc.c | 269 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } }, 324 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 328 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } }, 340 { 0, { (const PTR) &m32r_cgen_ifld_table[M32R_F_R1] } },
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H A D | m32r-desc.h | 152 , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8 enumerator
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