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Searched refs:MASK_INSV (Results 1 – 11 of 11) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/
H A Dtranslate.c690 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
14678 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
14949 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/
H A Dtranslate.c690 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
14662 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
14933 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c629 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
16984 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
17253 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c629 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
16984 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
17253 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dtranslate.c656 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
23000 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
23271 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dtranslate.c698 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
24093 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
24364 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dtranslate.c667 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
27431 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
27702 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dtranslate.c668 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
27538 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
27809 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dtranslate.c667 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
27431 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
27702 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dtranslate.c710 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
27970 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
28241 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dtranslate.c696 #define MASK_INSV(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6))) macro
28284 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()
28555 op2 = MASK_INSV(ctx->opcode); in decode_opc_special3_legacy()