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Searched refs:MASK_MSA_VEC (Results 1 – 10 of 10) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/
H A Dmsa_translate.c2098 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)))
2106 switch (MASK_MSA_VEC(ctx->opcode)) {
2141 switch (MASK_MSA_VEC(ctx->opcode)) {
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dmsa_translate.c2099 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
2107 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
2142 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c18343 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
18352 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
18387 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c18343 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
18352 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
18387 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dtranslate.c24408 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
24416 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
24451 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dtranslate.c29780 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
29788 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
29823 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dtranslate.c29887 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
29895 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
29930 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dtranslate.c29780 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
29788 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
29823 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dtranslate.c30483 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
30491 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
30526 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dtranslate.c30641 #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) in gen_msa_vec_v() macro
30649 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec_v()
30684 switch (MASK_MSA_VEC(ctx->opcode)) { in gen_msa_vec()