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Searched refs:MASK_OP_RLC_CONST16 (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6019 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6035 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6045 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu5/qemu-5.2.0/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6023 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6039 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6049 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6019 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6035 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6045 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu42/qemu-4.2.1/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6019 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6035 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6045 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/tricore/
H A Dtricore-opcodes.h197 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6031 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6047 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6057 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6019 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6035 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6045 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6011 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6027 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6037 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu/qemu-6.2.0/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c5999 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6015 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6025 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
/dports/emulators/qemu60/qemu-6.0.0/target/tricore/
H A Dtricore-opcodes.h200 #define MASK_OP_RLC_CONST16(op) MASK_BITS_SHIFT(op, 12, 27) macro
H A Dtranslate.c6023 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6039 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()
6049 const16 = MASK_OP_RLC_CONST16(ctx->opcode); in decode_rlc_opc()