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Searched refs:MAX_VGPU10_ADDR_REGS (Results 1 – 22 of 22) sorted by relevance

/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c294 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1241 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6965 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6327 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/svga/
H A Dsvga_tgsi.h33 #define MAX_VGPU10_ADDR_REGS 4 macro
H A Dsvga_tgsi_vgpu10.c256 unsigned address_reg_index[MAX_VGPU10_ADDR_REGS];
1163 assert(addr_reg_index < MAX_VGPU10_ADDR_REGS); in emit_indirect_register()
6382 assert(index < MAX_VGPU10_ADDR_REGS); in emit_arl_uarl()