| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | smemc.h | 29 #define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */ macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | smemc.h | 29 #define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */ macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
| H A D | smemc.h | 29 #define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */ macro
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| /dports/devel/openocd/openocd-0.11.0/tcl/board/ |
| H A D | pxa255_sst.cfg | 70 mww 0x4800003C 0x00004715 ;#MCIO1
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
|