Home
last modified time | relevance | path

Searched refs:MCPU (Results 1 – 25 of 369) sorted by relevance

12345678910>>...15

/dports/lang/zig/zig-0.9.0/ci/zinc/
H A Dlinux_build.sh7 MCPU="baseline"
16 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
17 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
26 -DZIG_TARGET_MCPU="$MCPU" \
49 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
50 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
58 -DZIG_TARGET_MCPU="$MCPU" \
/dports/lang/zig-devel/zig-0.9.0/ci/zinc/
H A Dlinux_build.sh7 MCPU="baseline"
16 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
17 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
26 -DZIG_TARGET_MCPU="$MCPU" \
49 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
50 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
58 -DZIG_TARGET_MCPU="$MCPU" \
/dports/math/opensolaris-libm/opensolaris-libm-2017.01.31/usr/src/libm/wos/
H A DMakefile29 MCPU:sh = uname -p target
31 DESTDIR = destdir-$(MCPU)
35 CG = $(CG_$(MCPU))
80 FPDEF = $(FPDEF_$(MCPU))
148 MDIR = $(MCPU)
189 $(COBJS_$(MCPU)) \
276 $(QOBJS_$(MCPU)) \
367 $(ROBJS_$(MCPU)) \
433 $(SOBJS_$(MCPU)) \
468 $(m9xOBJS_$(MCPU)) \
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir1 # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=none -o - %s | FileCheck -check-prefix=MCPU %s
7 # MCPU: @with_cpu_attr() #0 {
8 # MCPU: @no_cpu_attr() #1 {
10 # MCPU: attributes #0 = { "target-cpu"="fiji" }
11 # MCPU: attributes #1 = { "target-cpu"="hawaii" }
/dports/lang/zig/zig-0.9.0/ci/drone/
H A Dlinux_script_build15 MCPU="baseline"
17 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
18 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
51 -DZIG_TARGET_MCPU="$MCPU" \
/dports/lang/zig-devel/zig-0.9.0/ci/drone/
H A Dlinux_script_build15 MCPU="baseline"
17 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
18 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
51 -DZIG_TARGET_MCPU="$MCPU" \
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/tools/llvm-mca/Views/
H A DInstructionView.h31 StringRef MCPU; variable
41 StringRef MCPU = StringRef())
42 : STI(STI), MCIP(Printer), Source(S), MCPU(MCPU), in STI()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/tools/llvm-mca/Views/
H A DInstructionView.h31 StringRef MCPU; variable
41 StringRef MCPU = StringRef())
42 : STI(STI), MCIP(Printer), Source(S), MCPU(MCPU), in STI()
/dports/math/opensolaris-libm/opensolaris-libm-2017.01.31/usr/src/libm/wos64/
H A DMakefile35 MCPU:sh = uname -p target
41 CG = $(CG_$(MCPU))
44 CHIP = $(CHIP_$(MCPU))
82 FPDEF = $(FPDEF_$(MCPU))
111 COPT = -Xa -Kpic -xstrconst $(OLVL_$(MCPU)) $(COPT_$(MCPU)) $(LM_IL)
151 MDIR = $(MCPU)
188 $(COBJS_$(MCPU)) \
289 $(QOBJS_$(MCPU)) \
376 $(ROBJS_$(MCPU)) \
440 $(SOBJS_$(MCPU)) \
[all …]
H A DMakefile.bsd57 MCPU:sh = \
75 CG = $(CG_$(MCPU))
78 CHIP = $(CHIP_$(MCPU))
127 $(CDEF_$(MCPU))
138 COPT = $(OLVL_$(MCPU)) $(COPT_$(MCPU))
166 MDIR = $(MCPU)
195 $(COBJS_$(MCPU)) \
296 $(QOBJS_$(MCPU)) \
383 $(ROBJS_$(MCPU)) \
447 $(SOBJS_$(MCPU)) \
[all …]
/dports/lang/zig/zig-0.9.0/ci/azure/
H A Dmacos_script11 MCPU="baseline"
23 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
24 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
41 -DZIG_TARGET_MCPU="$MCPU" \
/dports/lang/zig-devel/zig-0.9.0/ci/azure/
H A Dmacos_script11 MCPU="baseline"
23 export CC="$ZIG cc -target $TARGET -mcpu=$MCPU"
24 export CXX="$ZIG c++ -target $TARGET -mcpu=$MCPU"
41 -DZIG_TARGET_MCPU="$MCPU" \
/dports/multimedia/v4l_compat/linux-5.13-rc2/tools/power/cpupower/debug/i386/
H A Dcentrino-decode.c24 #define MCPU 32 macro
38 if (cpu > MCPU) in rdmsr()
102 if (cpu >= MCPU) in main()

12345678910>>...15