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Searched refs:MDISP (Results 1 – 25 of 27) sorted by relevance

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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dalpha-opc.c154 #define MDISP (LIT + 1) macro
155 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
158 #define BDISP (MDISP + 1)
468 #define ARG_MEM { RA, MDISP, PRB }
469 #define ARG_FMEM { FA, MDISP, PRB }
539 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
541 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dalpha-opc.c153 #define MDISP (LIT + 1) macro
154 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
157 #define BDISP (MDISP + 1)
467 #define ARG_MEM { RA, MDISP, PRB }
468 #define ARG_FMEM { FA, MDISP, PRB }
538 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
540 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dalpha-opc.c273 #define MDISP (LIT + 1) macro
274 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
277 #define BDISP (MDISP + 1)
414 #define ARG_MEM { RA, MDISP, PRB }
415 #define ARG_FMEM { FA, MDISP, PRB }
485 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
487 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dalpha-opc.c273 #define MDISP (LIT + 1) macro
274 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
277 #define BDISP (MDISP + 1)
414 #define ARG_MEM { RA, MDISP, PRB }
415 #define ARG_FMEM { FA, MDISP, PRB }
485 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
487 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dalpha-opc.c153 #define MDISP (LIT + 1)
154 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
157 #define BDISP (MDISP + 1)
467 #define ARG_MEM { RA, MDISP, PRB }
468 #define ARG_FMEM { FA, MDISP, PRB }
538 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
540 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dalpha-opc.c273 #define MDISP (LIT + 1) macro
274 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
277 #define BDISP (MDISP + 1)
414 #define ARG_MEM { RA, MDISP, PRB }
415 #define ARG_FMEM { FA, MDISP, PRB }
485 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
487 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/binutils/binutils-2.37/opcodes/
H A Dalpha-opc.c272 #define MDISP (LIT + 1) macro
273 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
276 #define BDISP (MDISP + 1)
413 #define ARG_MEM { RA, MDISP, PRB }
414 #define ARG_FMEM { FA, MDISP, PRB }
484 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
486 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dalpha-dis.c371 #define MDISP (LIT + 1) macro
372 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
375 #define BDISP (MDISP + 1)
653 #define ARG_MEM { RA, MDISP, PRB }
654 #define ARG_FMEM { FA, MDISP, PRB }
724 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
726 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dalpha.c370 #define MDISP (LIT + 1) macro
371 { 16, 0, -MDISP, AXP_OPERAND_SIGNED, 0, 0 },
374 #define BDISP (MDISP + 1)
652 #define ARG_MEM { RA, MDISP, PRB }
653 #define ARG_FMEM { FA, MDISP, PRB }
723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
/dports/devel/binutils/binutils-2.37/gas/
H A DChangeLog-20092416 Take care of -MDISP in operand table.
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/
H A DChangeLog-20092416 Take care of -MDISP in operand table.
/dports/devel/arm-elf-binutils/binutils-2.37/gas/
H A DChangeLog-20092416 Take care of -MDISP in operand table.

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