/dports/finance/gnucash/gnucash-4.9/doc/examples/ |
H A D | invoice.csv | 1 MEC-0072,,000013,,,,34-0655 > PROTOBLOC 2 BREADBOARD,ea,Expenses:Materials General,1,4.39,,,,no,,,,… 2 MEC-0072,,000013,,,,18-0105 > PP3 / PP6 BATTERY CLIP 150MM (RC),ea,Expenses:Materials General,10,0.… 3 MEC-0072,,000013,,,,62-0370 > 1k CR25 0.25W CF Resistor Pk 100,ea,Expenses:Materials General,1,0.50… 4 MEC-0072,,000013,,,,62-0354 > 220R CR25 0.25W CF Resistor Pk 100,ea,Expenses:Materials General,1,0.… 5 MEC-0072,,000013,,,,34-5548 > PLAIN DOCUMENT WALLET ASSORTED PK 50 RE,ea,Expenses:Materials General… 6 MEC-0072,,000013,,,,62-0386 > 4k7 CR25 0.25W CF Resistor Pk 100,ea,Expenses:Materials General,1,0.5… 7 MEC-0072,,000013,,,,34-0860 > COPPER CLAD SRBP SS 100 X 160 (RC),ea,Expenses:Materials General,5,0.… 8 MEC-0072,,000013,,,,18-0163 > PP3 BATTERY HOLDER WITH FLYING LEADS RC,ea,Expenses:Materials General… 10 MEC-0072,,000013,,,,81-0014 > BC108 NPN GP TRANSISTOR RC,ea,Expenses:Materials General,20,0.16,,,,n… 11 MEC-0072,,000013,,,,DELIVERY,ea,Expenses:Postage,1,4.95,,,,no,,,,,,, [all …]
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/dports/devel/avr-gdb/gdb-7.3.1/sim/erc32/ |
H A D | README.erc32 | 2 1. MEC and ERC32 emulation 4 The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram. 6 The following paragraphs outline the implemented MEC functions. 38 The interrupt controller is implemented as in the MEC specification with 54 The breakpoint and watchpoint functions are implemented as in the MEC 71 0x01f80000 - 0x01f800ff MEC registers 81 size, the remaining fields are not used. NOTE: after reset, the MEC 90 in the MEC control register. 94 - MEC control register (bit 3 only) (0x01f80000, read-write) 122 1.9 MEC control register [all …]
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H A D | NEWS | 15 * added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart 53 * Additional MEC functionallity added - software reset, memory access 107 * Implemented buffered output for MEC uarts to improve output speed.
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/dports/devel/gdb761/gdb-7.6.1/sim/erc32/ |
H A D | README.erc32 | 2 1. MEC and ERC32 emulation 4 The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram. 6 The following paragraphs outline the implemented MEC functions. 38 The interrupt controller is implemented as in the MEC specification with 54 The breakpoint and watchpoint functions are implemented as in the MEC 71 0x01f80000 - 0x01f800ff MEC registers 81 size, the remaining fields are not used. NOTE: after reset, the MEC 90 in the MEC control register. 94 - MEC control register (bit 3 only) (0x01f80000, read-write) 122 1.9 MEC control register [all …]
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H A D | NEWS | 15 * added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart 53 * Additional MEC functionallity added - software reset, memory access 107 * Implemented buffered output for MEC uarts to improve output speed.
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/erc32/ |
H A D | README.erc32 | 2 1. MEC and ERC32 emulation 4 The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram. 6 The following paragraphs outline the implemented MEC functions. 38 The interrupt controller is implemented as in the MEC specification with 54 The breakpoint and watchpoint functions are implemented as in the MEC 71 0x01f80000 - 0x01f800ff MEC registers 81 size, the remaining fields are not used. NOTE: after reset, the MEC 90 in the MEC control register. 94 - MEC control register (bit 3 only) (0x01f80000, read-write) 122 1.9 MEC control register [all …]
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H A D | NEWS | 15 * added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart 53 * Additional MEC functionallity added - software reset, memory access 107 * Implemented buffered output for MEC uarts to improve output speed.
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/erc32/ |
H A D | README.erc32 | 2 1. MEC and ERC32 emulation 4 The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram. 6 The following paragraphs outline the implemented MEC functions. 38 The interrupt controller is implemented as in the MEC specification with 54 The breakpoint and watchpoint functions are implemented as in the MEC 71 0x01f80000 - 0x01f800ff MEC registers 81 size, the remaining fields are not used. NOTE: after reset, the MEC 90 in the MEC control register. 94 - MEC control register (bit 3 only) (0x01f80000, read-write) 122 1.9 MEC control register [all …]
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H A D | NEWS | 15 * added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart 53 * Additional MEC functionallity added - software reset, memory access 107 * Implemented buffered output for MEC uarts to improve output speed.
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/dports/www/nextcloud/nextcloud/apps-pkg/text/js/highlight/ |
H A D | lisp.js.map | 1 …MEC","QUOTED","contains","keywords","name","QUOTED_ATOM","LIST","BODY","endsWithParent","SHEBANG"]…
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/dports/biology/molden/molden5.8/plush/ |
H A D | MEC | 1 mol="MEC" Charge="0"
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/dports/devel/z80-asm/z80-asm-2.3/ |
H A D | asm_token | 8 IAN,IAH,IAV,TCC,MEC
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/dports/lang/gcc9/gcc-9.4.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc11/gcc-11.2.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc10/gcc-10.3.0/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/i386/ |
H A D | glm.md | 20 ;; Goldmont has 3 out-of-order IEC, 2 out-of--order FEC and out-of-order MEC. 26 ;; Goldmont has 3 clusters - IEC, FPC, MEC 30 ;; MEC has two execution ports - MEC-0 (load) and MEC-1 (store0. 97 ;; Normal alu insns without carry, but use MEC.
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/dports/cad/kicad-library-footprints-devel/kicad-footprints-ac8de318d8ef7b3eb64c78c6c2650b7b085f3271/Button_Switch_THT.pretty/ |
H A D | SW_MEC_5GTH9.kicad_mod | 2 …(descr "MEC 5G single pole normally-open tactile switch https://cdn.sos.sk/productdata/80/f6/aabf7…
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/dports/cad/kicad-library-footprints-devel/kicad-footprints-ac8de318d8ef7b3eb64c78c6c2650b7b085f3271/Button_Switch_SMD.pretty/ |
H A D | SW_MEC_5GSH9.kicad_mod | 2 (descr "MEC 5G single pole normally-open tactile switch")
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/dports/www/grafana8/azure-sdk-for-go-sdk-azidentity-v0.10.0/services/databoxedge/mgmt/2020-12-01/databoxedge/ |
H A D | enums.go | 815 MEC RoleTypes = "MEC" const 820 return []RoleTypes{ASA, CloudEdgeManagement, Cognitive, Functions, IOT, Kubernetes, MEC}
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