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Searched refs:MII_TG3_AUX_CTRL (Results 1 – 24 of 24) sorted by relevance

/dports/sysutils/syslinux/syslinux-6.03/gpxe/src/drivers/net/
H A Dtg3.c272 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x7007); in tg3_phy_set_wirespeed()
273 tg3_readphy(tp, MII_TG3_AUX_CTRL, &val); in tg3_phy_set_wirespeed()
274 tg3_writephy(tp, MII_TG3_AUX_CTRL, (val | (1 << 15) | (1 << 4))); in tg3_phy_set_wirespeed()
442 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00); in tg3_phy_reset_5703_4_5()
463 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400); in tg3_phy_reset_5703_4_5()
678 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c20); in tg3_init_5401phy_dsp()
704 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x02); in tg3_setup_copper_phy()
2592 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00); in tg3_phy_probe()
H A Dtg3.h1521 #define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2342 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/net/ipxe/ipxe-2265a65/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c229 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL)) in tg3_writephy()
428 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
552 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
556 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
H A Dtg3.h2355 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/broadcom/
H A Dtg3.h2324 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
H A Dtg3.c1182 (reg == MII_CTRL1000 || reg == MII_TG3_AUX_CTRL)) in __tg3_writephy()
1305 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
1309 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
1319 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/broadcom/
H A Dtg3.h2324 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
H A Dtg3.c1182 (reg == MII_CTRL1000 || reg == MII_TG3_AUX_CTRL)) in __tg3_writephy()
1305 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
1309 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
1319 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/broadcom/
H A Dtg3.h2324 #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ macro
H A Dtg3.c1182 (reg == MII_CTRL1000 || reg == MII_TG3_AUX_CTRL)) in __tg3_writephy()
1305 err = tg3_writephy(tp, MII_TG3_AUX_CTRL, in tg3_phy_auxctl_read()
1309 err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); in tg3_phy_auxctl_read()
1319 return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); in tg3_phy_auxctl_write()