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/dports/biology/seqan-apps/seqan-seqan-v2.4.0/apps/mason2/tests/
H A Dsimulator.out8.stderr69 PROBABILITY MISMATCH SCALE 1
70 PROBABILITY MISMATCH AVG 0.004
71 PROBABILITY MISMATCH BEGIN 0.002
72 PROBABILITY MISMATCH END 0.012
73 MISMATCH RAISE POINT 0.66
80 MEAN MISMATCH QUALITY BEGIN 40
81 MEAN MISMATCH QUALITY END 30
82 STDDEV MISMATCH QUALITY BEGIN 3
83 STDDEV MISMATCH QUALITY END 15
95 PROBABILITY MISMATCH BEGIN 0.005
[all …]
/dports/emulators/qemu/qemu-6.2.0/dtc/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \ macro
50 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
56 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
121 MISMATCH("Property length mismatch %u != %u " in compare_structure()
125 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu42/qemu-4.2.1/dtc/tests/
H A Ddtbs_equal_ordered.c33 #define MISMATCH(fmt, ...) \ macro
63 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
69 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
99 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
114 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
129 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
134 MISMATCH("Property length mismatch %u != %u " in compare_structure()
138 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
169 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c34 #define MISMATCH(fmt, ...) \ macro
82 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
94 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
127 MISMATCH("Property '%s' missing\n", name); in compare_properties()
142 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
145 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
167 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
219 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu60/qemu-6.0.0/dtc/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \ macro
50 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
56 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
121 MISMATCH("Property length mismatch %u != %u " in compare_structure()
125 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu5/qemu-5.2.0/dtc/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \ macro
50 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
56 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
121 MISMATCH("Property length mismatch %u != %u " in compare_structure()
125 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/dtc/tests/
H A Ddtbs_equal_ordered.c33 #define MISMATCH(fmt, ...) \ macro
63 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
69 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
99 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
114 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
129 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
134 MISMATCH("Property length mismatch %u != %u " in compare_structure()
138 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
169 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c34 #define MISMATCH(fmt, ...) \ macro
82 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
94 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
127 MISMATCH("Property '%s' missing\n", name); in compare_properties()
142 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
145 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
167 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
219 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu-utils/qemu-4.2.1/dtc/tests/
H A Ddtbs_equal_ordered.c33 #define MISMATCH(fmt, ...) \ macro
63 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
69 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
99 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
114 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
129 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
134 MISMATCH("Property length mismatch %u != %u " in compare_structure()
138 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
169 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c34 #define MISMATCH(fmt, ...) \ macro
82 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
94 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
127 MISMATCH("Property '%s' missing\n", name); in compare_properties()
142 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
145 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
167 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
219 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/dtc/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \ macro
50 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
56 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
121 MISMATCH("Property length mismatch %u != %u " in compare_structure()
125 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/dtc/tests/
H A Ddtbs_equal_ordered.c33 #define MISMATCH(fmt, ...) \ macro
63 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
69 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
99 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
114 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
129 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
134 MISMATCH("Property length mismatch %u != %u " in compare_structure()
138 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
169 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c34 #define MISMATCH(fmt, ...) \
82 MISMATCH("Trees have different number of reserve entries");
94 MISMATCH("Mismatch in reserve entry %d: "
127 MISMATCH("Property '%s' missing\n", name);
142 MISMATCH("Property '%s' mismatched length %d vs. %d\n",
145 MISMATCH("Property '%s' mismatched value\n", name);
167 MISMATCH("Subnode %s missing\n", name);
219 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x",
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/dtc/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \ macro
50 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
56 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)", in compare_structure()
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)", in compare_structure()
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" " in compare_structure()
121 MISMATCH("Property length mismatch %u != %u " in compare_structure()
125 MISMATCH("Property value mismatch at (%d, %d)", in compare_structure()
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/sysutils/dtc/dtc-1.6.0/tests/
H A Ddtbs_equal_ordered.c20 #define MISMATCH(fmt, ...) \
50 MISMATCH("Trees have different number of reserve entries");
56 MISMATCH("Mismatch in reserve entry %d: "
86 MISMATCH("Tag mismatch (%d != %d) at (%d, %d)",
101 MISMATCH("Name mismatch (\"%s\" != \"%s\") at (%d, %d)",
116 MISMATCH("Property name mismatch \"%s\" != \"%s\" "
121 MISMATCH("Property length mismatch %u != %u "
125 MISMATCH("Property value mismatch at (%d, %d)",
156 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x",
H A Ddtbs_equal_unordered.c22 #define MISMATCH(fmt, ...) \ macro
70 MISMATCH("Trees have different number of reserve entries"); in compare_mem_rsv()
82 MISMATCH("Mismatch in reserve entry %d: " in compare_mem_rsv()
115 MISMATCH("Property '%s' missing\n", name); in compare_properties()
130 MISMATCH("Property '%s' mismatched length %d vs. %d\n", in compare_properties()
133 MISMATCH("Property '%s' mismatched value\n", name); in compare_properties()
155 MISMATCH("Subnode %s missing\n", name); in compare_subnodes()
226 MISMATCH("boot_cpuid_phys mismatch 0x%x != 0x%x", in main()
/dports/cad/cascade-compiler/cascade-f4f7ae8bd1dd379790c0e58c286df90b8d1cdcde/share/cascade/test/benchmark/nw/
H A Dnw.v12 parameter signed MISMATCH = -1 constant
27 wire signed [SWIDTH-1:0] tl_score = tl + (in1 == in2 ? MATCH : MISMATCH);
45 parameter signed MISMATCH = -1 constant
65 Cell#(LENGTH,CWIDTH,SWIDTH,MATCH,INDEL,MISMATCH) c(-1, -1, 0, c1, c2, out);
67 … Cell#(LENGTH,CWIDTH,SWIDTH,MATCH,INDEL,MISMATCH) c(-j, ROW[1].COL[j-1].out, -j+1, c1, c2, out);
69 … Cell#(LENGTH,CWIDTH,SWIDTH,MATCH,INDEL,MISMATCH) c(ROW[i-1].COL[j].out, -i, -i+1, c1, c2, out);
71 …Cell#(LENGTH,CWIDTH,SWIDTH,MATCH,INDEL,MISMATCH) c(ROW[i-1].COL[j].out, ROW[i].COL[j-1].out, ROW[i…
/dports/devel/libvirt/libvirt-7.10.0/src/conf/
H A Dcpu_conf.c989 #define MISMATCH(fmt, ...) \ in virCPUDefIsEqual() macro
994 MISMATCH("%s", _("Target CPU does not match source")); in virCPUDefIsEqual()
999 MISMATCH(_("Target CPU type %s does not match source %s"), in virCPUDefIsEqual()
1006 MISMATCH(_("Target CPU mode %s does not match source %s"), in virCPUDefIsEqual()
1013 MISMATCH(_("Target CPU check %s does not match source %s"), in virCPUDefIsEqual()
1020 MISMATCH(_("Target CPU arch %s does not match source %s"), in virCPUDefIsEqual()
1027 MISMATCH(_("Target CPU model %s does not match source %s"), in virCPUDefIsEqual()
1033 MISMATCH(_("Target CPU vendor %s does not match source %s"), in virCPUDefIsEqual()
1051 MISMATCH(_("Target CPU dies %d does not match source %d"), in virCPUDefIsEqual()
1057 MISMATCH(_("Target CPU cores %d does not match source %d"), in virCPUDefIsEqual()
[all …]
/dports/biology/mothur/mothur-1.46.1/source/chimera/
H A Dchimerarealigner.cpp143 int MISMATCH = -4; in calcMatchScore() local
147 if(q == 'G') { score = (MATCH * p.G + MISMATCH * (p.A + p.T + p.C + p.Gap)); } in calcMatchScore()
148 else if(q == 'A') { score = (MATCH * p.A + MISMATCH * (p.G + p.T + p.C + p.Gap)); } in calcMatchScore()
149 else if(q == 'T') { score = (MATCH * p.T + MISMATCH * (p.G + p.A + p.C + p.Gap)); } in calcMatchScore()
150 else if(q == 'C') { score = (MATCH * p.C + MISMATCH * (p.G + p.A + p.T + p.Gap)); } in calcMatchScore()
151 else { score = (MATCH * p.A + MISMATCH * (p.G + p.T + p.C + p.Gap)); } in calcMatchScore()
/dports/shells/yash/yash-2.51/
H A Dxfnmatch.c498 return MISMATCH; in xfnm_wmatch()
527 return MISMATCH; in wmatch_literal()
529 return MISMATCH; in wmatch_literal()
537 return MISMATCH; in wmatch_literal()
540 return MISMATCH; in wmatch_literal()
556 return MISMATCH; in wmatch_literal()
593 return MISMATCH; in wmatch_headtail()
637 xfnmresult_T result = MISMATCH; in wmatch_shortest_tail()
658 return MISMATCH; in wmatch_longest()
664 return MISMATCH; in wmatch_longest()
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