| /dports/emulators/qemu5/qemu-5.2.0/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
360 return env->msr | (env->msr_c * (MSR_C | MSR_CC)); in mb_cpu_read_msr()
370 env->msr = val & ~(MSR_C | MSR_CC | MSR_PVR); in mb_cpu_write_msr()
|
| H A D | translate.c | 1345 tcg_gen_muli_i32(t, cpu_msr_c, MSR_C | MSR_CC); in msr_read()
1374 imm &= ~(MSR_C | MSR_CC | MSR_PVR); in do_msrclrset()
1421 tcg_gen_andi_i32(cpu_msr, src, ~(MSR_C | MSR_CC | MSR_PVR)); in trans_mts()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
374 return env->msr | (env->msr_c * (MSR_C | MSR_CC)); in mb_cpu_read_msr()
384 env->msr = val & ~(MSR_C | MSR_CC | MSR_PVR); in mb_cpu_write_msr()
|
| H A D | translate.c | 1335 tcg_gen_muli_i32(t, cpu_msr_c, MSR_C | MSR_CC); in msr_read()
1364 imm &= ~(MSR_C | MSR_CC | MSR_PVR); in do_msrclrset()
1411 tcg_gen_andi_i32(cpu_msr, src, ~(MSR_C | MSR_CC | MSR_PVR)); in trans_mts()
|
| /dports/emulators/qemu/qemu-6.2.0/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
374 return env->msr | (env->msr_c * (MSR_C | MSR_CC)); in mb_cpu_read_msr()
384 env->msr = val & ~(MSR_C | MSR_CC | MSR_PVR); in mb_cpu_write_msr()
|
| H A D | translate.c | 1346 tcg_gen_muli_i32(t, cpu_msr_c, MSR_C | MSR_CC); in msr_read()
1375 imm &= ~(MSR_C | MSR_CC | MSR_PVR); in do_msrclrset()
1422 tcg_gen_andi_i32(cpu_msr, src, ~(MSR_C | MSR_CC | MSR_PVR)); in trans_mts()
|
| /dports/emulators/qemu60/qemu-6.0.0/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
372 return env->msr | (env->msr_c * (MSR_C | MSR_CC)); in mb_cpu_read_msr()
382 env->msr = val & ~(MSR_C | MSR_CC | MSR_PVR); in mb_cpu_write_msr()
|
| H A D | translate.c | 1345 tcg_gen_muli_i32(t, cpu_msr_c, MSR_C | MSR_CC); in msr_read()
1374 imm &= ~(MSR_C | MSR_CC | MSR_PVR); in do_msrclrset()
1421 tcg_gen_andi_i32(cpu_msr, src, ~(MSR_C | MSR_CC | MSR_PVR)); in trans_mts()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/microblaze/include/asm/ |
| H A D | registers.h | 21 #define MSR_CC (1<<31) macro
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/microblaze/include/asm/ |
| H A D | registers.h | 21 #define MSR_CC (1<<31) macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/microblaze/include/asm/ |
| H A D | registers.h | 21 #define MSR_CC (1<<31) macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
|
| H A D | translate.c | 758 tcg_gen_andi_i32(t0, t0, MSR_CC); in dec_bit()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
|
| H A D | translate.c | 758 tcg_gen_andi_i32(t0, t0, MSR_CC); in dec_bit()
|
| /dports/emulators/qemu42/qemu-4.2.1/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
|
| H A D | translate.c | 758 tcg_gen_andi_i32(t0, t0, MSR_CC); in dec_bit()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/microblaze/ |
| H A D | cpu.h | 73 #define MSR_CC (1<<31) macro
|
| H A D | translate.c | 757 tcg_gen_andi_i32(t0, t0, MSR_CC); in dec_bit()
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/microblaze/ |
| H A D | cpu.h | 67 #define MSR_CC (1<<31) macro
|
| H A D | translate.c | 758 tcg_gen_andi_i32(t0, t0, MSR_CC); in dec_bit()
|
| /dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| H A D | tables.go | 951 MSR_CC const
5534 MSR_CC: "MSR.CC",
|
| /dports/lang/go-devel/go-dragonfly-amd64-bootstrap/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| H A D | tables.go | 951 MSR_CC const
5534 MSR_CC: "MSR.CC",
|