/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/kvm/ |
H A D | lapic.h | 28 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE, 29 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE, 185 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 186 return MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 254 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
|
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/kvm/ |
H A D | lapic.h | 28 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE, 29 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE, 185 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 186 return MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 254 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
|
/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/kvm/ |
H A D | lapic.h | 28 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE, 29 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE, 185 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 186 return MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled() 254 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
|
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/hw/intc/ |
H A D | apic.c | 127 (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); in apic_set_base() 129 if (!(val & MSR_IA32_APICBASE_ENABLE)) { in apic_set_base() 130 s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; in apic_set_base()
|
/dports/emulators/unicorn/unicorn-1.0.2/qemu/hw/intc/ |
H A D | apic.c | 127 (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); in apic_set_base() 129 if (!(val & MSR_IA32_APICBASE_ENABLE)) { in apic_set_base() 130 s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; in apic_set_base()
|
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/x86/cpu/ |
H A D | lapic.c | 72 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 85 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/x86/cpu/ |
H A D | lapic.c | 72 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 85 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/x86/cpu/ |
H A D | lapic.c | 73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/x86/cpu/ |
H A D | lapic.c | 72 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 85 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/x86/cpu/ |
H A D | lapic.c | 72 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic() 85 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
|