| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/ |
| H A D | mret.h | 5 reg_t prev_virt = get_field(s, MSTATUS_MPV);
11 s = set_field(s, MSTATUS_MPV, 0);
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | cpu_bits.h | 368 #define MSTATUS_MPV 0x8000000000ULL macro
371 #define MSTATUS_MPV 0x00000080 macro
375 # define MSTATUS_MPV_ISSET(env) get_field(env->mstatush, MSTATUS_MPV)
377 # define MSTATUS_MPV_ISSET(env) get_field(env->mstatus, MSTATUS_MPV)
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| H A D | op_helper.c | 157 env->mstatush = set_field(env->mstatush, MSTATUS_MPV, 0); in helper_mret()
159 mstatus = set_field(mstatus, MSTATUS_MPV, 0); in helper_mret()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | cpu_bits.h | 374 #define MSTATUS_MPV 0x8000000000ULL macro
377 #define MSTATUS_MPV 0x00000080 macro
381 # define MSTATUS_MPV_ISSET(env) get_field(env->mstatush, MSTATUS_MPV)
383 # define MSTATUS_MPV_ISSET(env) get_field(env->mstatus, MSTATUS_MPV)
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| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/lib/sbi/ |
| H A D | sbi_trap.c | 89 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
117 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
118 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 28 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
127 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_illegal_insn.c | 46 if ((regs->mstatus & MSTATUS_MPV) && in system_opcode_insn()
136 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_illegal_insn_handler()
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| H A D | sbi_trap.c | 87 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
117 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
118 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 28 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
127 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| H A D | sbi_misaligned_ldst.c | 35 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_misaligned_load_handler()
142 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_misaligned_store_handler()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_illegal_insn.c | 46 if ((regs->mstatus & MSTATUS_MPV) && in system_opcode_insn()
136 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_illegal_insn_handler()
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| H A D | sbi_trap.c | 87 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
117 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
118 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 28 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
127 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| H A D | sbi_misaligned_ldst.c | 35 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_misaligned_load_handler()
142 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_misaligned_store_handler()
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| H A D | sbi_hart.c | 285 val = INSERT_FIELD(val, MSTATUS_MPV, 1); in sbi_hart_switch_mode()
287 val = INSERT_FIELD(val, MSTATUS_MPV, 0); in sbi_hart_switch_mode()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/lib/sbi/ |
| H A D | sbi_trap.c | 90 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
118 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
119 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 45 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
160 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| /dports/sysutils/opensbi/opensbi-0.9/lib/sbi/ |
| H A D | sbi_trap.c | 90 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
118 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
119 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 45 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
160 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| /dports/emulators/qemu/qemu-6.2.0/roms/opensbi/lib/sbi/ |
| H A D | sbi_trap.c | 90 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
118 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
119 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| H A D | sbi_emulate_csr.c | 45 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
160 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/lib/sbi/ |
| H A D | sbi_emulate_csr.c | 28 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_read()
127 bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_emulate_csr_write()
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| H A D | sbi_trap.c | 89 bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; in sbi_trap_redirect()
117 regs->mstatus &= ~MSTATUS_MPV; in sbi_trap_redirect()
118 regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; in sbi_trap_redirect()
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| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | op_helper.c | 153 target_ulong prev_virt = get_field(env->mstatus, MSTATUS_MPV); in helper_mret()
158 mstatus = set_field(mstatus, MSTATUS_MPV, 0); in helper_mret()
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| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | op_helper.c | 158 target_ulong prev_virt = get_field(env->mstatus, MSTATUS_MPV); in helper_mret()
163 mstatus = set_field(mstatus, MSTATUS_MPV, 0); in helper_mret()
|