| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/riscv/ |
| H A D | op_helper.c | 120 MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) { in csr_write_helper()
124 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in csr_write_helper()
131 MSTATUS_MPRV | MSTATUS_SUM)) { in csr_write_helper()
135 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in csr_write_helper()
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| H A D | cpu_bits.h | 260 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | csr.c | 315 MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) { in write_mstatus()
319 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
326 MSTATUS_MPRV | MSTATUS_SUM)) { in write_mstatus()
330 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
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| H A D | cpu_bits.h | 348 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | csr.c | 315 MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) { in write_mstatus()
319 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
326 MSTATUS_MPRV | MSTATUS_SUM)) { in write_mstatus()
330 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
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| H A D | cpu_bits.h | 348 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 30 #define MSTATUS_SUM _UL(0x00040000) macro
58 #define SSTATUS_SUM MSTATUS_SUM
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 29 #define MSTATUS_SUM _UL(0x00040000) macro
56 #define SSTATUS_SUM MSTATUS_SUM
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| /dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 30 #define MSTATUS_SUM _UL(0x00040000) macro
58 #define SSTATUS_SUM MSTATUS_SUM
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| /dports/sysutils/opensbi/opensbi-0.9/include/sbi/ |
| H A D | riscv_encoding.h | 30 #define MSTATUS_SUM _UL(0x00040000) macro
58 #define SSTATUS_SUM MSTATUS_SUM
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| /dports/emulators/qemu/qemu-6.2.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 30 #define MSTATUS_SUM _UL(0x00040000) macro
58 #define SSTATUS_SUM MSTATUS_SUM
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | csr.c | 363 MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) { in write_mstatus()
367 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
374 MSTATUS_MPRV | MSTATUS_SUM)) { in write_mstatus()
378 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
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| H A D | cpu_bits.h | 360 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| H A D | cpu_helper.c | 113 target_ulong mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS | in riscv_cpu_swap_hypervisor_regs()
382 sum = get_field(env->mstatus, MSTATUS_SUM); in get_physical_address()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | csr.c | 374 MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) { in write_mstatus()
378 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
385 MSTATUS_MPRV | MSTATUS_SUM)) { in write_mstatus()
389 MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM | in write_mstatus()
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| H A D | cpu_bits.h | 366 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | cpu_bits.h | 350 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| H A D | cpu_helper.c | 110 uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS | in riscv_cpu_swap_hypervisor_regs()
432 sum = get_field(env->mstatus, MSTATUS_SUM) || use_background || is_debug; in get_physical_address()
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| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | cpu_bits.h | 378 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| H A D | cpu_helper.c | 113 uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS | in riscv_cpu_swap_hypervisor_regs()
370 sum = get_field(env->mstatus, MSTATUS_SUM); in get_physical_address()
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| /dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
| H A D | cpu_bits.h | 382 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | cpu_bits.h | 379 #define MSTATUS_SUM 0x00040000 /* since: priv-1.10 */ macro
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| H A D | cpu_helper.c | 114 uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS | in riscv_cpu_swap_hypervisor_regs()
419 sum = get_field(env->mstatus, MSTATUS_SUM) || use_background; in get_physical_address()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 35 #define MSTATUS_SUM 0x00040000 macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 35 #define MSTATUS_SUM 0x00040000 macro
|