| /dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/ |
| H A D | sret.h | 7 require_privilege(get_field(STATE.mstatus->read(), MSTATUS_TSR) ? PRV_M : PRV_S);
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/ |
| H A D | op_helper.c | 86 get_field(env->mstatus, MSTATUS_TSR)) { in helper_sret()
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| H A D | cpu_bits.h | 353 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu42/qemu-4.2.1/target/riscv/ |
| H A D | op_helper.c | 86 get_field(env->mstatus, MSTATUS_TSR)) { in helper_sret()
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| H A D | cpu_bits.h | 353 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/ |
| H A D | op_helper.c | 88 get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
|
| H A D | cpu_bits.h | 365 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/riscv/ |
| H A D | cpu_bits.h | 265 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
|
| /dports/emulators/qemu5/qemu-5.2.0/target/riscv/ |
| H A D | op_helper.c | 93 if (get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
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| H A D | cpu_bits.h | 383 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu60/qemu-6.0.0/target/riscv/ |
| H A D | op_helper.c | 93 if (get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
|
| H A D | cpu_bits.h | 384 #define MSTATUS_TSR 0x00400000 /* since: priv-1.10 */ macro
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
| H A D | op_helper.c | 145 get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
|
| H A D | cpu_bits.h | 371 #define MSTATUS_TSR 0x40000000 /* since: priv-1.10 */ macro
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/ |
| H A D | op_helper.c | 88 if (get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
|
| H A D | cpu_bits.h | 354 #define MSTATUS_TSR 0x00400000 /* since: priv-1.10 */ macro
|
| /dports/emulators/qemu/qemu-6.2.0/target/riscv/ |
| H A D | op_helper.c | 88 if (get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
|
| H A D | cpu_bits.h | 386 #define MSTATUS_TSR 0x00400000 /* since: priv-1.10 */ macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 39 #define MSTATUS_TSR 0x00400000 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 39 #define MSTATUS_TSR 0x00400000 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 34 #define MSTATUS_TSR _UL(0x00400000) macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 33 #define MSTATUS_TSR _UL(0x00400000) macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 34 #define MSTATUS_TSR _UL(0x00400000) macro
|
| /dports/sysutils/opensbi/opensbi-0.9/include/sbi/ |
| H A D | riscv_encoding.h | 34 #define MSTATUS_TSR _UL(0x00400000) macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/opensbi/include/sbi/ |
| H A D | riscv_encoding.h | 34 #define MSTATUS_TSR _UL(0x00400000) macro
|