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Searched refs:MVPP2_CLS_MODE_REG (Results 1 – 25 of 70) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h100 #define MVPP2_CLS_MODE_REG 0x1800 macro
H A Dmvpp2_cls.c910 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h100 #define MVPP2_CLS_MODE_REG 0x1800 macro
H A Dmvpp2_cls.c910 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h100 #define MVPP2_CLS_MODE_REG 0x1800 macro
H A Dmvpp2_cls.c910 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Marvell/Drivers/Net/Pp2Dxe/
H A DMvpp2LibHw.h68 #define MVPP2_CLS_MODE_REG 0x1800 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/
H A Dmvpp2.c112 #define MVPP2_CLS_MODE_REG 0x1800 macro
2492 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/
H A Dmvpp2.c112 #define MVPP2_CLS_MODE_REG 0x1800 macro
2492 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/
H A Dmvpp2.c112 #define MVPP2_CLS_MODE_REG 0x1800 macro
2492 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/net/
H A Dmvpp2.c121 #define MVPP2_CLS_MODE_REG 0x1800 macro
2481 mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK); in mvpp2_cls_init()

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