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Searched refs:MVPP2_PRS_RI_L3_IP4 (Results 1 – 25 of 73) sorted by relevance

123

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c29 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
48 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
64 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
83 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
99 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
118 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
134 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
153 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
269 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4,
283 MVPP2_PRS_RI_L3_IP4,
H A Dmvpp2_prs.h204 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
H A Dmvpp2_prs.c1447 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1660 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_pppoe_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c29 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
48 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
64 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
83 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
99 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
118 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
134 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
153 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
269 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4,
283 MVPP2_PRS_RI_L3_IP4,
H A Dmvpp2_prs.h204 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
H A Dmvpp2_prs.c1447 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1660 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_pppoe_init()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c29 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
48 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
64 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
83 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
99 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
118 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
134 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
153 MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
269 MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4,
283 MVPP2_PRS_RI_L3_IP4,
H A Dmvpp2_prs.h204 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
H A Dmvpp2_prs.c1447 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1660 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_pppoe_init()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Marvell/Drivers/Net/Pp2Dxe/
H A DMvpp2LibHw.h1750 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
H A DMvpp2Lib.c1684 Mvpp2PrsSramRiUpdate (&Pe, MVPP2_PRS_RI_L3_IP4, MVPP2_PRS_RI_L3_PROTO_MASK); in Mvpp2PrsEtypeInit()
1696 Mvpp2PrsShadowRiSet (Priv, Pe.Index, MVPP2_PRS_RI_L3_IP4, MVPP2_PRS_RI_L3_PROTO_MASK); in Mvpp2PrsEtypeInit()
1911 Mvpp2PrsSramRiUpdate (&Pe, MVPP2_PRS_RI_L3_IP4, MVPP2_PRS_RI_L3_PROTO_MASK); in Mvpp2PrsPppoeInit()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/
H A Dmvpp2.c796 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2100 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/
H A Dmvpp2.c796 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2100 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/
H A Dmvpp2.c796 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2100 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/
H A Dmvpp2.c788 #define MVPP2_PRS_RI_L3_IP4 BIT(12) macro
2089 mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()

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