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Searched refs:MXS_NAND_COMMAND_BUFFER_SIZE (Results 1 – 25 of 126) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dmxs_nand.c41 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
43 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
72 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
277 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1080 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1086 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/mtd/nand/raw/
H A Dmxs_nand.c41 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
43 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
72 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
277 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1080 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1086 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dmxs_nand.c41 #define MXS_NAND_COMMAND_BUFFER_SIZE 32
43 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE
72 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE);
277 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) {
1080 MXS_NAND_COMMAND_BUFFER_SIZE);
1086 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE);
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dmxs_nand.c41 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
43 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
72 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
277 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1080 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1086 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/mtd/nand/raw/
H A Dmxs_nand.c41 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
43 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
72 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
277 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1080 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1086 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/mtd/nand/
H A Dmxs_nand.c40 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
94 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
268 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1045 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1051 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dmxs_nand.c46 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 macro
48 #define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE macro
77 flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_flush_cmd_buf()
347 if (nand_info->cmd_queue_len == MXS_NAND_COMMAND_BUFFER_SIZE) { in mxs_nand_cmd_ctrl()
1238 MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()
1244 memset(nand_info->cmd_buf, 0, MXS_NAND_COMMAND_BUFFER_SIZE); in mxs_nand_alloc_buffers()

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