| /dports/security/vault/vault-1.8.2/vendor/github.com/apache/arrow/cpp/src/arrow/compute/kernels/ |
| H A D | aggregate_basic.cc | 183 inline T MaskedValue(bool valid, T value) const { return valid ? value : 0; } in MaskedValue() function
191 local.sum += MaskedValue(bits & (1U << i), values[i]); in UnrolledSum()
|
| /dports/www/grafana8/grafana-8.3.6/vendor/github.com/apache/arrow/cpp/src/arrow/compute/kernels/ |
| H A D | aggregate_basic_internal.h | 121 inline T MaskedValue(bool valid, T value) const { return valid ? value : 0; } in MaskedValue() function
129 local.sum += MaskedValue(bits & (1U << i), values[i]); in UnrolledSum()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1202 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1206 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1202 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1206 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1111 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1111 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1174 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1178 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1202 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1206 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1111 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1110 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1114 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1111 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1174 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1178 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1196 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1200 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1197 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1107 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT);
1111 MaskedValue, ShiftAmt);
|