| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 42 if ( (MmioRead8 (PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
43 || (MmioRead8 (PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
44 || (MmioRead8 (PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
45 || (MmioRead8 (PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
50 if ( (MmioRead8 (PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
51 || (MmioRead8 (PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
52 || ((MmioRead8 (PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
53 || (MmioRead8 (PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
128 if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) { in Get()
253 if (MmioRead8 (PL061_GPIO_DIR_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) { in GetMode()
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {
|
| /dports/sysutils/edk2/edk2-edk2-stable202102/ArmPlatformPkg/Library/PL111Lcd/ |
| H A D | PL111Lcd.c | 33 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 && in LcdIdentify()
34 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 && in LcdIdentify()
35 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 && in LcdIdentify()
36 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 && in LcdIdentify()
37 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 && in LcdIdentify()
38 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 && in LcdIdentify()
39 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 && in LcdIdentify()
40 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) { in LcdIdentify()
|
| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/NXP/Library/DUartPortLib/ |
| H A D | DUartPortLib.c | 66 McrBits = MmioRead8 (UartBase + UMCR); in SerialPortSetControl()
135 MsrRegister = MmioRead8 (UartBase + UMSR); in SerialPortGetControl()
136 McrRegister = MmioRead8 (UartBase + UMCR); in SerialPortGetControl()
137 LsrRegister = MmioRead8 (UartBase + ULSR); in SerialPortGetControl()
199 while (!(MmioRead8 (UartBase + ULSR) & DUART_LSR_TEMT)); in DuartInitializePort()
266 while ((MmioRead8 (UartBase + ULSR) & DUART_LSR_THRE) == 0); in SerialPortWrite()
298 while ((MmioRead8 (UartBase + ULSR) & DUART_LSR_DR) == 0); in SerialPortRead()
300 *Buffer = MmioRead8 (UartBase + URBR); in SerialPortRead()
324 return ((MmioRead8 (UartBase + ULSR) & DUART_LSR_DR) != 0); in SerialPortPoll()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask));
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D)
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0)
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05)
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) {
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61)
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10)
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) {
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) {
|
| /dports/sysutils/edk2/edk2-edk2-stable202102/ArmPlatformPkg/Drivers/PL061GpioDxe/ |
| H A D | PL061Gpio.c | 90 return MmioRead8 (PL061EffectiveAddress (Address, Mask)); in PL061GetPins()
130 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D) in PL061Identify()
131 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0) in PL061Identify()
132 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05) in PL061Identify()
133 || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) { in PL061Identify()
138 if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61) in PL061Identify()
139 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10) in PL061Identify()
140 || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04) in PL061Identify()
141 || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) { in PL061Identify()
293 if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { in GetMode()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| H A D | PL031RealTimeClockLib.c | 46 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D) in IdentifyPL031()
47 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0) in IdentifyPL031()
48 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05) in IdentifyPL031()
49 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) { in IdentifyPL031()
55 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31) in IdentifyPL031()
56 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10) in IdentifyPL031()
57 || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04) in IdentifyPL031()
58 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) { in IdentifyPL031()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| H A D | PL031RealTimeClockLib.c | 45 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D) in IdentifyPL031()
46 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0) in IdentifyPL031()
47 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05) in IdentifyPL031()
48 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) { in IdentifyPL031()
54 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31) in IdentifyPL031()
55 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10) in IdentifyPL031()
56 || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04) in IdentifyPL031()
57 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) { in IdentifyPL031()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| H A D | PL031RealTimeClockLib.c | 46 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D) in IdentifyPL031()
47 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0) in IdentifyPL031()
48 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05) in IdentifyPL031()
49 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) { in IdentifyPL031()
55 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31) in IdentifyPL031()
56 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10) in IdentifyPL031()
57 || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04) in IdentifyPL031()
58 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) { in IdentifyPL031()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| H A D | PL031RealTimeClockLib.c | 45 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D) in IdentifyPL031()
46 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0) in IdentifyPL031()
47 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05) in IdentifyPL031()
48 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) { in IdentifyPL031()
54 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31) in IdentifyPL031()
55 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10) in IdentifyPL031()
56 || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04) in IdentifyPL031()
57 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) { in IdentifyPL031()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
| H A D | PL031RealTimeClockLib.c | 46 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D) in IdentifyPL031()
47 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0) in IdentifyPL031()
48 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05) in IdentifyPL031()
49 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) { in IdentifyPL031()
55 if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31) in IdentifyPL031()
56 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10) in IdentifyPL031()
57 || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04) in IdentifyPL031()
58 || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) { in IdentifyPL031()
|