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Searched refs:NPU_SIZE (Results 1 – 25 of 35) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c49 #define NPU_SIZE 0x2c macro
128 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in add_opencapi_dt_nodes()
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c49 #define NPU_SIZE 0x2c macro
128 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in add_opencapi_dt_nodes()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c49 #define NPU_SIZE 0x2c macro
128 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in add_opencapi_dt_nodes()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c49 #define NPU_SIZE 0x2c
128 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in getCategory()
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c49 #define NPU_SIZE 0x2c macro
128 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in add_opencapi_dt_nodes()
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/platforms/ibm-fsp/
H A Dzz.c56 #define NPU_SIZE 0x2c macro
134 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in add_opencapi_dt_nodes()
/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/platforms/astbmc/
H A Dzaius.c135 #define NPU_SIZE 0x2c macro
184 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c254 #define NPU_SIZE 0x2c macro
291 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/platforms/astbmc/
H A Dzaius.c135 #define NPU_SIZE 0x2c macro
184 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c254 #define NPU_SIZE 0x2c macro
291 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/platforms/astbmc/
H A Dzaius.c135 #define NPU_SIZE 0x2c macro
184 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c254 #define NPU_SIZE 0x2c macro
291 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/platforms/astbmc/
H A Dzaius.c135 #define NPU_SIZE 0x2c macro
184 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c254 #define NPU_SIZE 0x2c macro
291 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/platforms/astbmc/
H A Dzaius.c122 #define NPU_SIZE 0x2c macro
170 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c198 #define NPU_SIZE 0x2c macro
235 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c243 #define NPU_SIZE 0x2c macro
280 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/platforms/astbmc/
H A Dzaius.c135 #define NPU_SIZE 0x2c macro
184 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in zaius_create_npu()
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/platforms/astbmc/
H A Dgarrison.c212 #define NPU_SIZE 0x2c macro
249 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()
H A Dp8dnu.c254 #define NPU_SIZE 0x2c macro
291 dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); in dt_create_npu()

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