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Searched refs:NUM_TX_DESC (Results 1 – 25 of 689) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/
H A Ddc2114x.c117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
119 #define NUM_TX_DESC 4 macro
135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
343 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
356 txRingSize = NUM_TX_DESC; in dc21x4x_init()
418 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
516 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/net/
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Dinca-ip_sw.c37 #define NUM_TX_DESC 3 macro
153 static inca_tx_descriptor_t tx_ring[NUM_TX_DESC] __attribute__ ((aligned(16)));
268 for (i = 0; i < NUM_TX_DESC; i++) { in inca_switch_init()
279 if (i == (NUM_TX_DESC - 1)) { in inca_switch_init()
319 tx_hold = NUM_TX_DESC - 1; in inca_switch_init()
380 tx_new = (tx_new + 1) % NUM_TX_DESC; in inca_switch_send()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/net/
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Dinca-ip_sw.c37 #define NUM_TX_DESC 3 macro
153 static inca_tx_descriptor_t tx_ring[NUM_TX_DESC] __attribute__ ((aligned(16)));
268 for (i = 0; i < NUM_TX_DESC; i++) { in inca_switch_init()
279 if (i == (NUM_TX_DESC - 1)) { in inca_switch_init()
319 tx_hold = NUM_TX_DESC - 1; in inca_switch_init()
380 tx_new = (tx_new + 1) % NUM_TX_DESC; in inca_switch_send()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/
H A Ddc2114x.c117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
119 #define NUM_TX_DESC 4 macro
135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
343 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
356 txRingSize = NUM_TX_DESC; in dc21x4x_init()
418 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
516 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/net/
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Dinca-ip_sw.c37 #define NUM_TX_DESC 3 macro
153 static inca_tx_descriptor_t tx_ring[NUM_TX_DESC] __attribute__ ((aligned(16)));
268 for (i = 0; i < NUM_TX_DESC; i++) { in inca_switch_init()
279 if (i == (NUM_TX_DESC - 1)) { in inca_switch_init()
319 tx_hold = NUM_TX_DESC - 1; in inca_switch_init()
380 tx_new = (tx_new + 1) % NUM_TX_DESC; in inca_switch_send()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/net/
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Dinca-ip_sw.c37 #define NUM_TX_DESC 3 macro
153 static inca_tx_descriptor_t tx_ring[NUM_TX_DESC] __attribute__ ((aligned(16)));
268 for (i = 0; i < NUM_TX_DESC; i++) { in inca_switch_init()
279 if (i == (NUM_TX_DESC - 1)) { in inca_switch_init()
319 tx_hold = NUM_TX_DESC - 1; in inca_switch_init()
380 tx_new = (tx_new + 1) % NUM_TX_DESC; in inca_switch_send()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/net/
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Dinca-ip_sw.c37 #define NUM_TX_DESC 3 macro
153 static inca_tx_descriptor_t tx_ring[NUM_TX_DESC] __attribute__ ((aligned(16)));
268 for (i = 0; i < NUM_TX_DESC; i++) { in inca_switch_init()
279 if (i == (NUM_TX_DESC - 1)) { in inca_switch_init()
319 tx_hold = NUM_TX_DESC - 1; in inca_switch_init()
380 tx_new = (tx_new + 1) % NUM_TX_DESC; in inca_switch_send()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/net/
H A Ddc2114x.c117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
119 #define NUM_TX_DESC 4 macro
135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
343 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
356 txRingSize = NUM_TX_DESC; in dc21x4x_init()
418 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
516 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/
H A Ddc2114x.c117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
119 #define NUM_TX_DESC 4 macro
135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
343 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
356 txRingSize = NUM_TX_DESC; in dc21x4x_init()
418 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
516 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/net/
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/net/
H A Ddc2114x.c119 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
121 #define NUM_TX_DESC 4 macro
138 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
346 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
352 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
359 txRingSize = NUM_TX_DESC; in dc21x4x_init()
421 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
519 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/net/
H A Drtl8169.c93 #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ macro
287 static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256];
293 static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE];
316 unsigned char *Tx_skbuff[NUM_TX_DESC];
473 int entry = tpc->cur_tx % NUM_TX_DESC; in rtl_send()
495 if (entry != (NUM_TX_DESC - 1)) { in rtl_send()
635 memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); in rtl8169_init_ring()
638 for (i = 0; i < NUM_TX_DESC; i++) { in rtl8169_init_ring()
H A Ddc2114x.c135 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
137 #define NUM_TX_DESC 4 macro
154 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
352 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
358 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
365 txRingSize = NUM_TX_DESC; in dc21x4x_init()
427 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
524 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/net/
H A Ddc2114x.c117 #define NUM_TX_DESC 1 /* Number of TX descriptors */ macro
119 #define NUM_TX_DESC 4 macro
135 static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring …
343 for (i=0; i < NUM_TX_DESC; i++) { in dc21x4x_init()
349 tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC])); in dc21x4x_init()
356 txRingSize = NUM_TX_DESC; in dc21x4x_init()
418 tx_new = (tx_new+1) % NUM_TX_DESC; in dc21x4x_send()
516 tx_new = (tx_new+1) % NUM_TX_DESC; in send_setup_frame()

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