Home
last modified time | relevance | path

Searched refs:OPC_SHLL_OB_DSP (Results 1 – 11 of 11) sorted by relevance

/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/
H A Dtranslate.c400 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
895 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
896 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
897 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
898 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
899 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
900 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
901 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
902 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
12780 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/
H A Dtranslate.c400 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
895 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
896 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
897 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
898 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
899 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
900 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
901 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
902 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
12769 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c407 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
834 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
835 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
836 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
837 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
838 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
839 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
840 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
841 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
14840 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dtranslate.c407 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
834 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
835 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
836 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
837 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
838 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
839 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
840 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
841 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
14840 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dtranslate.c416 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
861 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
862 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
863 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
864 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
865 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
866 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
867 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
868 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
21161 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dtranslate.c408 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
903 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
904 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
905 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
906 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
907 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
908 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
909 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
910 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
22188 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dtranslate.c419 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
872 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
873 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
874 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
875 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
876 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
877 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
878 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
879 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
23131 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dtranslate.c420 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
873 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
874 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
875 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
876 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
877 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
878 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
879 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
880 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
23219 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dtranslate.c419 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
872 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
873 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
874 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
875 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
876 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
877 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
878 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
879 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
23131 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dtranslate.c420 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
915 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
916 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
917 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
918 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
919 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
920 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
921 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
922 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
23651 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dtranslate.c448 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator
901 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP,
902 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP,
903 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP,
904 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP,
905 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP,
906 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP,
907 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP,
908 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP,
23965 case OPC_SHLL_OB_DSP: in gen_mipsdsp_shift()
[all …]