| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/ |
| H A D | nanomips_translate.c.inc | 2778 gen_flt_ldst(ctx, OPC_SWC1, rd, t0);
4071 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u);
4133 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u);
4183 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s);
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| H A D | micromips_translate.c.inc | 2813 mips32_op = OPC_SWC1;
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| H A D | translate.c | 120 OPC_SWC1 = (0x39 << 26), enumerator
2325 case OPC_SWC1: in gen_flt_ldst()
15601 case OPC_SWC1: in decode_opc_legacy()
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| /dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/ |
| H A D | nanomips_translate.c.inc | 2784 gen_flt_ldst(ctx, OPC_SWC1, rd, t0);
4077 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u);
4139 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u);
4189 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s);
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| H A D | micromips_translate.c.inc | 2813 mips32_op = OPC_SWC1;
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| H A D | translate.c | 120 OPC_SWC1 = (0x39 << 26), enumerator
2325 case OPC_SWC1: in gen_flt_ldst()
15585 case OPC_SWC1: in decode_opc_legacy()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
| H A D | translate.c | 114 OPC_SWC1 = (0x39 << 26), enumerator
2600 case OPC_SWC1: in gen_flt_ldst()
15560 mips32_op = OPC_SWC1; in decode_micromips32_opc()
18513 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
19799 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
19859 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
19909 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
24943 case OPC_SWC1: in decode_opc()
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| /dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
| H A D | translate.c | 108 OPC_SWC1 = (0x39 << 26), enumerator
2462 case OPC_SWC1: in gen_flt_ldst()
16437 mips32_op = OPC_SWC1; in decode_micromips32_opc()
19430 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
20717 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
20779 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
20829 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
25024 case OPC_SWC1: in decode_opc_legacy()
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
| H A D | translate.c | 115 OPC_SWC1 = (0x39 << 26), enumerator
3803 case OPC_SWC1: in gen_flt_ldst()
17371 mips32_op = OPC_SWC1; in decode_micromips32_opc()
20372 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
21660 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
21722 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
21772 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
30348 case OPC_SWC1:
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
| H A D | translate.c | 115 OPC_SWC1 = (0x39 << 26), enumerator
3806 case OPC_SWC1: in gen_flt_ldst()
17459 mips32_op = OPC_SWC1; in decode_micromips32_opc()
20460 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
21748 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
21810 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
21860 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
30455 case OPC_SWC1:
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| /dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
| H A D | translate.c | 115 OPC_SWC1 = (0x39 << 26), enumerator
3803 case OPC_SWC1: in gen_flt_ldst()
17371 mips32_op = OPC_SWC1; in decode_micromips32_opc()
20372 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
21660 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
21722 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
21772 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
30348 case OPC_SWC1:
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| /dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
| H A D | translate.c | 115 OPC_SWC1 = (0x39 << 26), enumerator
3849 case OPC_SWC1: in gen_flt_ldst()
17899 mips32_op = OPC_SWC1; in decode_micromips32_opc()
20892 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
22180 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
22242 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
22292 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
31051 case OPC_SWC1:
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
| H A D | translate.c | 120 OPC_SWC1 = (0x39 << 26), enumerator
4222 case OPC_SWC1: in gen_flt_ldst()
18198 mips32_op = OPC_SWC1; in decode_micromips32_opc()
21204 gen_flt_ldst(ctx, OPC_SWC1, rd, t0); in gen_p_lsx()
22492 gen_cop1_ldst(ctx, OPC_SWC1, rt, 28, u); in decode_nanomips_32_48_opc()
22554 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, u); in decode_nanomips_32_48_opc()
22604 gen_cop1_ldst(ctx, OPC_SWC1, rt, rs, s); in decode_nanomips_32_48_opc()
31211 case OPC_SWC1:
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| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | translate.c | 106 OPC_SWC1 = (0x39 << 26), enumerator
2369 case OPC_SWC1: in gen_flt_ldst()
13867 mips32_op = OPC_SWC1; in decode_micromips32_opc()
18835 case OPC_SWC1: in decode_opc()
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| /dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | translate.c | 106 OPC_SWC1 = (0x39 << 26), enumerator
2369 case OPC_SWC1: in gen_flt_ldst()
13867 mips32_op = OPC_SWC1; in decode_micromips32_opc()
18835 case OPC_SWC1: in decode_opc()
|