Home
last modified time | relevance | path

Searched refs:OPP_DSP_CLK_NUM (Results 1 – 25 of 62) sorted by relevance

123

/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Dfdt.c157 #define OPP_DSP_CLK_NUM 3 macro
161 const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = {
178 u32 dra7_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
186 u32 dra76_opp_dsp_clk_rates[NUM_OPPS][OPP_DSP_CLK_NUM] = {
274 ret = ft_fixup_clocks(fdt, clk_names, clk_rates, OPP_DSP_CLK_NUM); in ft_opp_clock_fixups()

123