| /dports/science/InsightToolkit/ITK-5.0.1/Modules/Filtering/MathematicalMorphology/include/ |
| H A D | itkAnchorErodeDilateImageFilter.hxx | 70 InputImageRegionType OReg = outputRegionForThread; in DynamicThreadedGenerateData() local
125 IterType oit(this->GetOutput(), OReg); in DynamicThreadedGenerateData()
126 IterType iit(internalbuffer, OReg); in DynamicThreadedGenerateData()
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| H A D | itkVanHerkGilWermanErodeDilateImageFilter.hxx | 70 InputImageRegionType OReg = outputRegionForThread; in DynamicThreadedGenerateData() local
114 IterType oit(this->GetOutput(), OReg); in DynamicThreadedGenerateData()
115 IterType iit(internalbuffer, OReg); in DynamicThreadedGenerateData()
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| H A D | itkAnchorOpenCloseImageFilter.hxx | 78 InputImageRegionType OReg = outputRegionForThread; in DynamicThreadedGenerateData() local
164 IterType oit(this->GetOutput(), OReg); in DynamicThreadedGenerateData()
165 IterType iit(internalbuffer, OReg); in DynamicThreadedGenerateData()
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| /dports/devel/asl/asl-current/ |
| H A D | codeh16.c | 2763 Byte XReg, BReg, YReg, OReg, SReg, DReg; in DecodeBFMOV() local
2771 && DecodeStringReg(&ArgStr[4], MModeReg, &OReg) in DecodeBFMOV()
2777 BAsmCode[CodeLen++] = (YReg << 4) | OReg; in DecodeBFMOV()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2370 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2377 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2385 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2370 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2377 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2385 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2371 Register OReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2378 BuildMI(DispContBB, DL, TII->get(VE::LDLZXrri), OReg) in emitSjLjDispatchBlock()
2386 .addReg(OReg, getKillRegState(true)) in emitSjLjDispatchBlock()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 28441 unsigned OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
28446 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
28453 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29657 unsigned OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
29662 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
29669 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30734 unsigned OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
30739 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
30746 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32139 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
32144 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
32151 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32127 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
32132 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
32139 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32139 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
32144 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
32151 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 33432 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
33437 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
33444 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34137 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
34142 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32966 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
32971 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
32978 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34137 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
34142 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 33688 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
33693 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
33700 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32989 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
32994 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
33001 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34131 Register OReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local
34136 BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg) in EmitSjLjDispatchBlock()
34143 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
|