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Searched refs:OReg64 (Results 1 – 17 of 17) sorted by relevance

/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp28442 unsigned OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
28453 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
28456 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp29658 unsigned OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
29669 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
29672 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp30735 unsigned OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
30746 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
30749 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp32140 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
32151 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
32154 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp32128 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
32139 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
32142 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp32140 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
32151 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
32154 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp33433 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
33444 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
33447 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34138 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
34152 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp32967 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
32978 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
32981 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp34138 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
34152 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp33689 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
33700 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
33703 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/
H A DX86ISelLowering.cpp32990 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
33001 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
33004 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34132 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
34143 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
34146 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34138 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
34152 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp33689 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
33700 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
33703 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34138 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
34149 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
34152 .addReg(OReg64) in EmitSjLjDispatchBlock()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp34994 Register OReg64 = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
35005 BuildMI(DispContBB, DL, TII->get(X86::MOVSX64rr32), OReg64).addReg(OReg); in EmitSjLjDispatchBlock()
35008 .addReg(OReg64) in EmitSjLjDispatchBlock()