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Searched refs:OSCR4 (Results 1 – 25 of 82) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h17 #define OSCR4 io_p2v(0x40A00040) /* OS Timer Counter Register */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h17 #define OSCR4 io_p2v(0x40A00040) /* OS Timer Counter Register */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h17 #define OSCR4 io_p2v(0x40A00040) /* OS Timer Counter Register */ macro
/dports/emulators/qemu42/qemu-4.2.1/hw/timer/
H A Dpxa2xx_timer.c34 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu/qemu-6.2.0/hw/timer/
H A Dpxa2xx_timer.c35 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu60/qemu-6.0.0/hw/timer/
H A Dpxa2xx_timer.c35 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/timer/
H A Dpxa2xx_timer.c31 #define OSCR4 0x40 macro
209 case OSCR4: in pxa2xx_timer_read()
326 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu5/qemu-5.2.0/hw/timer/
H A Dpxa2xx_timer.c35 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/timer/
H A Dpxa2xx_timer.c34 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/timer/
H A Dpxa2xx_timer.c34 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/timer/
H A Dpxa2xx_timer.c35 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/timer/
H A Dpxa2xx_timer.c34 #define OSCR4 0x40 macro
212 case OSCR4: in pxa2xx_timer_read()
329 case OSCR4: in pxa2xx_timer_write()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h929 #define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ macro
2630 #define OSCR4 0x40A00040 /* OS Timer Counter Register */ macro

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