/dports/lang/mono/mono-5.10.1.57/external/ikvm/reflect/Emit/ |
H A D | OpCodes.cs | 30 public static readonly OpCode Nop = new OpCode(4888); 31 public static readonly OpCode Break = new OpCode(4199116); 32 public static readonly OpCode Ldarg_0 = new OpCode(8492847); 33 public static readonly OpCode Ldarg_1 = new OpCode(12687151); 34 public static readonly OpCode Ldarg_2 = new OpCode(16881455); 35 public static readonly OpCode Ldarg_3 = new OpCode(21075759); 36 public static readonly OpCode Ldloc_0 = new OpCode(25270063); 37 public static readonly OpCode Ldloc_1 = new OpCode(29464367); 38 public static readonly OpCode Ldloc_2 = new OpCode(33658671); 39 public static readonly OpCode Ldloc_3 = new OpCode(37852975); [all …]
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/dports/lang/mono/mono-5.10.1.57/mcs/class/referencesource/mscorlib/system/reflection/emit/ |
H A D | opcodes.cs | 267 public static readonly OpCode Nop = new OpCode(OpCodeValues.Nop, 277 public static readonly OpCode Break = new OpCode(OpCodeValues.Break, 627 public static readonly OpCode Dup = new OpCode(OpCodeValues.Dup, 637 public static readonly OpCode Pop = new OpCode(OpCodeValues.Pop, 647 public static readonly OpCode Jmp = new OpCode(OpCodeValues.Jmp, 678 public static readonly OpCode Ret = new OpCode(OpCodeValues.Ret, 820 public static readonly OpCode Br = new OpCode(OpCodeValues.Br, 851 public static readonly OpCode Beq = new OpCode(OpCodeValues.Beq, 861 public static readonly OpCode Bge = new OpCode(OpCodeValues.Bge, 871 public static readonly OpCode Bgt = new OpCode(OpCodeValues.Bgt, [all …]
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/dports/lang/mono/mono-5.10.1.57/external/corefx/src/System.Reflection.Primitives/src/System/Reflection/Emit/ |
H A D | OpCodes.cs | 257 public static readonly OpCode Nop = new OpCode(OpCodeValues.Nop, 267 public static readonly OpCode Break = new OpCode(OpCodeValues.Break, 617 public static readonly OpCode Dup = new OpCode(OpCodeValues.Dup, 627 public static readonly OpCode Pop = new OpCode(OpCodeValues.Pop, 637 public static readonly OpCode Jmp = new OpCode(OpCodeValues.Jmp, 668 public static readonly OpCode Ret = new OpCode(OpCodeValues.Ret, 810 public static readonly OpCode Br = new OpCode(OpCodeValues.Br, 841 public static readonly OpCode Beq = new OpCode(OpCodeValues.Beq, 851 public static readonly OpCode Bge = new OpCode(OpCodeValues.Bge, 861 public static readonly OpCode Bgt = new OpCode(OpCodeValues.Bgt, [all …]
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/dports/devel/spirv-llvm-translator/SPIRV-LLVM-Translator-13.0.0/lib/SPIRV/libSPIRV/ |
H A D | SPIRVOpCode.h | 62 return OpCode == OpAtomicFAddEXT || OpCode == OpAtomicFMinEXT || in SPIRV_DEF_NAMEMAP() 69 OpCode == OpAtomicFlagTestAndSet || OpCode == OpAtomicFlagClear || in isAtomicOpCode() 73 return ((unsigned)OpCode >= OpIAdd && (unsigned)OpCode <= OpFMod) || in isBinaryOpCode() 87 return (unsigned)OpCode >= OpAny && (unsigned)OpCode <= OpSignBitSet; in isUnaryPredicateOpCode() 103 (OpCode >= OpLessOrGreater && OpCode <= OpLogicalNotEqual); in isCmpOpCode() 108 OpCode == OpSatConvertSToU || OpCode == OpSatConvertUToS || in isCvtOpCode() 114 return OpCode == OpConvertFToU || OpCode == OpUConvert || in isCvtToUnsignedOpCode() 119 return OpCode == OpConvertUToF || OpCode == OpUConvert || in isCvtFromUnsignedOpCode() 124 return OpCode == OpSatConvertUToS || OpCode == OpSatConvertSToU; in isSatCvtOpCode() 138 return OpCode == OpAccessChain || OpCode == OpInBoundsAccessChain; in isAccessChainOpCode() [all …]
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/dports/lang/mono/mono-5.10.1.57/external/corefx/src/System.Reflection.Primitives/ref/ |
H A D | System.Reflection.Primitives.cs | 34 public partial struct OpCode struct 48 …public static bool operator ==(System.Reflection.Emit.OpCode a, System.Reflection.Emit.OpCode b) {… in operator ==() argument 49 …public static bool operator !=(System.Reflection.Emit.OpCode a, System.Reflection.Emit.OpCode b) {… in operator !=() argument 55 public static readonly System.Reflection.Emit.OpCode Add; argument 58 public static readonly System.Reflection.Emit.OpCode And; 60 public static readonly System.Reflection.Emit.OpCode Beq; 62 public static readonly System.Reflection.Emit.OpCode Bge; 66 public static readonly System.Reflection.Emit.OpCode Bgt; 70 public static readonly System.Reflection.Emit.OpCode Ble; 74 public static readonly System.Reflection.Emit.OpCode Blt; [all …]
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/dports/lang/mono/mono-5.10.1.57/mcs/class/corlib/System.Reflection.Emit/ |
H A D | OpCodes.cs | 15 public static readonly OpCode Nop = new OpCode ( 19 public static readonly OpCode Break = new OpCode ( 23 public static readonly OpCode Ldarg_0 = new OpCode ( 27 public static readonly OpCode Ldarg_1 = new OpCode ( 31 public static readonly OpCode Ldarg_2 = new OpCode ( 35 public static readonly OpCode Ldarg_3 = new OpCode ( 39 public static readonly OpCode Ldloc_0 = new OpCode ( 43 public static readonly OpCode Ldloc_1 = new OpCode ( 47 public static readonly OpCode Ldloc_2 = new OpCode ( 51 public static readonly OpCode Ldloc_3 = new OpCode ( [all …]
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/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/AdaptorOCL/SPIRV/libSPIRV/ |
H A D | SPIRVOpCode.h | 75 OpCode == OpDot; in isBinaryOpCode() 102 (OpCode >= OpLessOrGreater && OpCode <= OpLogicalNotEqual); in isCmpOpCode() 141 unsigned OC = OpCode; in hasExecScope() 149 unsigned OC = OpCode; in hasGroupOperation() 157 unsigned OC = OpCode; in isSubgroupAvcINTELTypeOpCode() 192 inline bool isVCOpCode(Op OpCode) { return OpCode == OpTypeBufferSurfaceINTEL; } in isVCOpCode() argument 195 unsigned OC = OpCode; in isTypeOpCode() 203 unsigned OC = OpCode; in isConstantOpCode() 215 return (OpCode >= OpImageSampleImplicitLod) && (OpCode <= OpImageWrite); in isImageOpCode() 219 unsigned OC = OpCode; in isIntelSubgroupOpCode() [all …]
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/dports/lang/mono/mono-5.10.1.57/external/cecil-legacy/Mono.Cecil.Cil/ |
H A D | OpCodes.cs | 36 public static readonly OpCode Nop = new OpCode ( 40 public static readonly OpCode Break = new OpCode ( 44 public static readonly OpCode Ldarg_0 = new OpCode ( 48 public static readonly OpCode Ldarg_1 = new OpCode ( 52 public static readonly OpCode Ldarg_2 = new OpCode ( 56 public static readonly OpCode Ldarg_3 = new OpCode ( 60 public static readonly OpCode Ldloc_0 = new OpCode ( 64 public static readonly OpCode Ldloc_1 = new OpCode ( 180 public static readonly OpCode Dup = new OpCode ( 184 public static readonly OpCode Pop = new OpCode ( [all …]
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/dports/lang/mono/mono-5.10.1.57/external/linker/cecil/Mono.Cecil.Cil/ |
H A D | OpCodes.cs | 18 public static readonly OpCode Nop = new OpCode ( 22 public static readonly OpCode Break = new OpCode ( 26 public static readonly OpCode Ldarg_0 = new OpCode ( 30 public static readonly OpCode Ldarg_1 = new OpCode ( 34 public static readonly OpCode Ldarg_2 = new OpCode ( 38 public static readonly OpCode Ldarg_3 = new OpCode ( 42 public static readonly OpCode Ldloc_0 = new OpCode ( 46 public static readonly OpCode Ldloc_1 = new OpCode ( 50 public static readonly OpCode Ldloc_2 = new OpCode ( 54 public static readonly OpCode Ldloc_3 = new OpCode ( [all …]
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/dports/lang/mono/mono-5.10.1.57/external/cecil/Mono.Cecil.Cil/ |
H A D | OpCodes.cs | 18 public static readonly OpCode Nop = new OpCode ( 22 public static readonly OpCode Break = new OpCode ( 26 public static readonly OpCode Ldarg_0 = new OpCode ( 30 public static readonly OpCode Ldarg_1 = new OpCode ( 34 public static readonly OpCode Ldarg_2 = new OpCode ( 38 public static readonly OpCode Ldarg_3 = new OpCode ( 42 public static readonly OpCode Ldloc_0 = new OpCode ( 46 public static readonly OpCode Ldloc_1 = new OpCode ( 50 public static readonly OpCode Ldloc_2 = new OpCode ( 54 public static readonly OpCode Ldloc_3 = new OpCode ( [all …]
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/dports/devel/mono-addins/mono-addins-mono-addins-1.3/Mono.Addins.CecilReflector/Mono.Cecil/Mono.Cecil.Cil/ |
H A D | OpCodes.cs | 36 public static readonly OpCode Nop = new OpCode ( 40 public static readonly OpCode Break = new OpCode ( 44 public static readonly OpCode Ldarg_0 = new OpCode ( 48 public static readonly OpCode Ldarg_1 = new OpCode ( 52 public static readonly OpCode Ldarg_2 = new OpCode ( 56 public static readonly OpCode Ldarg_3 = new OpCode ( 60 public static readonly OpCode Ldloc_0 = new OpCode ( 64 public static readonly OpCode Ldloc_1 = new OpCode ( 180 public static readonly OpCode Dup = new OpCode ( 184 public static readonly OpCode Pop = new OpCode ( [all …]
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/dports/lang/mono-basic/mono-basic-4.7/vbnc/cecil/Mono.Cecil.Cil/ |
H A D | OpCodes.cs | 36 public static readonly OpCode Nop = new OpCode ( 40 public static readonly OpCode Break = new OpCode ( 44 public static readonly OpCode Ldarg_0 = new OpCode ( 48 public static readonly OpCode Ldarg_1 = new OpCode ( 52 public static readonly OpCode Ldarg_2 = new OpCode ( 56 public static readonly OpCode Ldarg_3 = new OpCode ( 60 public static readonly OpCode Ldloc_0 = new OpCode ( 64 public static readonly OpCode Ldloc_1 = new OpCode ( 180 public static readonly OpCode Dup = new OpCode ( 184 public static readonly OpCode Pop = new OpCode ( [all …]
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/dports/devel/libzookeeper/apache-zookeeper-3.7.0/zookeeper-server/src/main/java/org/apache/zookeeper/server/ |
H A D | Request.java | 247 case OpCode.check: in isValid() 249 case OpCode.create: in isValid() 254 case OpCode.delete: in isValid() 256 case OpCode.exists: in isValid() 257 case OpCode.getACL: in isValid() 263 case OpCode.multi: in isValid() 265 case OpCode.ping: in isValid() 271 case OpCode.sync: in isValid() 298 case OpCode.error: in isQuorum() 303 case OpCode.check: in isQuorum() [all …]
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/dports/java/jakarta-oro/jakarta-oro-2.0.8/src/java/org/apache/oro/text/regex/ |
H A D | Perl5Debug.java | 104 char operator = OpCode._OPEN, prog[]; in printProgram() 111 while(operator != OpCode._END) { in printProgram() 123 if(operator == OpCode._ANYOF) { in printProgram() 125 } else if(operator == OpCode._ANYOFUN || operator == OpCode._NANYOFUN) { in printProgram() 126 while(prog[offset] != OpCode._END) { in printProgram() 127 if(prog[offset] == OpCode._RANGE) in printProgram() 228 case OpCode._CURLY : in _printOperator() 234 case OpCode._CURLYX: in _printOperator() 240 case OpCode._REF: in _printOperator() 243 case OpCode._OPEN: in _printOperator() [all …]
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/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 82 UINT32 OpCode in MRegList() argument 161 UINT32 OpCode; in DisassembleArmInstruction() local 169 OpCode = **OpCodePtr; in DisassembleArmInstruction() 179 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 181 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 317 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 363 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 387 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 402 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 412 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/sysutils/edk2/edk2-edk2-stable202102/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 82 UINT32 OpCode in MRegList() argument 161 UINT32 OpCode; in DisassembleArmInstruction() local 169 OpCode = **OpCodePtr; in DisassembleArmInstruction() 179 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 181 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 317 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 363 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 387 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 402 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 412 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu/qemu-6.2.0/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode in MRegList() argument 176 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 177 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 178 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 87 UINT32 OpCode in MRegList() argument 184 Rn = (OpCode >> 16) & 0xf; in DisassembleArmInstruction() 185 Rd = (OpCode >> 12) & 0xf; in DisassembleArmInstruction() 186 Rm = (OpCode & 0xf); in DisassembleArmInstruction() 213 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… in DisassembleArmInstruction() 322 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; in DisassembleArmInstruction() 368 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); in DisassembleArmInstruction() 388 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); in DisassembleArmInstruction() 403 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… in DisassembleArmInstruction() 413 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… in DisassembleArmInstruction() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
H A D | ArmDisassembler.c | 81 UINT32 OpCode 176 Rn = (OpCode >> 16) & 0xf; 177 Rd = (OpCode >> 12) & 0xf; 178 Rm = (OpCode & 0xf); 205 …f, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W)… 314 offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; 360 AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); 380 AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); 395 …RS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateR… 405 …%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, R… [all …]
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/dports/net-p2p/go-ethereum/go-ethereum-1.10.14/core/vm/ |
H A D | opcodes.go | 24 type OpCode byte type 53 LT OpCode = 0x10 54 GT OpCode = 0x11 55 SLT OpCode = 0x12 56 SGT OpCode = 0x13 57 EQ OpCode = 0x14 58 ISZERO OpCode = 0x15 59 AND OpCode = 0x16 60 OR OpCode = 0x17 61 XOR OpCode = 0x18 [all …]
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