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Searched refs:OutR1 (Results 1 – 17 of 17) sorted by relevance

/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2935 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3041 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3043 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3045 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2929 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3035 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3037 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3039 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2935 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3041 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3043 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3045 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2929 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3035 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3037 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3039 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2935 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3041 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3043 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3045 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2929 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3035 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3037 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3039 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2931 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3037 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3039 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3041 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2932 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3038 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3040 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3042 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2924 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3030 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
3032 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
3034 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2939 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
3045 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1,
3047 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2))
3049 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1);