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Searched refs:PAGING_VTD_INDEX_MASK (Results 1 – 5 of 5) sorted by relevance

/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/
H A DTranslationTable.c433 #define PAGING_VTD_INDEX_MASK 0x1FF macro
509 Index5 = ((UINTN) RShiftU64 (Address, 48)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
510 Index4 = ((UINTN) RShiftU64 (Address, 39)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
511 Index3 = ((UINTN) Address >> 30) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
512 Index2 = ((UINTN) Address >> 21) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
513 Index1 = ((UINTN) Address >> 12) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/
H A DTranslationTable.c550 #define PAGING_VTD_INDEX_MASK 0x1FF macro
627 Index5 = ((UINTN)RShiftU64 (Address, 48)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
628 Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
629 Index3 = ((UINTN)Address >> 30) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
630 Index2 = ((UINTN)Address >> 21) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
631 Index1 = ((UINTN)Address >> 12) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/
H A DTranslationTable.c464 #define PAGING_VTD_INDEX_MASK 0x1FF macro
537 Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
538 Index3 = ((UINTN)Address >> 30) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
539 Index2 = ((UINTN)Address >> 21) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
540 Index1 = ((UINTN)Address >> 12) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/
H A DTranslationTable.c464 #define PAGING_VTD_INDEX_MASK 0x1FF macro
537 Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
538 Index3 = ((UINTN)Address >> 30) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
539 Index2 = ((UINTN)Address >> 21) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
540 Index1 = ((UINTN)Address >> 12) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/
H A DTranslationTable.c464 #define PAGING_VTD_INDEX_MASK 0x1FF macro
537 Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
538 Index3 = ((UINTN)Address >> 30) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
539 Index2 = ((UINTN)Address >> 21) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()
540 Index1 = ((UINTN)Address >> 12) & PAGING_VTD_INDEX_MASK; in GetSecondLevelPageTableEntry()