| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pci/controller/dwc/ |
| H A D | pcie-fu740.c | 46 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
186 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); in fu740_pcie_start_link()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pci/controller/dwc/ |
| H A D | pcie-fu740.c | 46 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
186 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); in fu740_pcie_start_link()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/pci/controller/dwc/ |
| H A D | pcie-fu740.c | 46 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
186 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); in fu740_pcie_start_link()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_dw_sifive.c | 86 #define PCIEX8MGMT_APP_LTSSM_ENABLE 0x10 macro
337 pcie_sifive_priv_set_state(sv, PCIEX8MGMT_APP_LTSSM_ENABLE, in pcie_sifive_start_link()
|