Searched refs:PCI_BAR2 (Results 1 – 9 of 9) sorted by relevance
/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/pci/ |
H A D | pucdata.c | 2154 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2164 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2174 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2184 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2195 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2206 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2236 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2248 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2260 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, 2273 { PUC_PORT_TYPE_COM, PCI_BAR2, 0x00, [all …]
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H A D | igma.c | 368 if (pci_mapreg_map(pa, PCI_BAR2, PCI_MAPREG_TYPE_MEM, in igma_attach()
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H A D | pcireg.h | 440 #define PCI_BAR2 0x18 macro
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/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/cardbus/ |
H A D | if_ex_cardbus.c | 76 #define CARDBUS_3C575BTX_FUNCSTAT_PCIREG PCI_BAR2 /* means 0x18 */
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H A D | cardbus.c | 515 cardbus_conf_write(cc, cf, tag, PCI_BAR2, 0); in cardbus_rescan()
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/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
H A D | VlvCommonDefinitions.h | 44 #define PCI_BAR2 0x0018 ///< Base Address Register 2 macro
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/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
H A D | VlvCommonDefinitions.h | 38 #define PCI_BAR2 0x0018 ///< Base Address Register 2
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/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/ |
H A D | QNCCommonDefinitions.h | 31 #define PCI_BAR2 0x0018 // Base Address Register 2 macro
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/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Include/ |
H A D | IohCommonDefinitions.h | 31 #define PCI_BAR2 0x0018 // Base Address Register 2 macro
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