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Searched refs:PCI_RMV_BASE (Results 1 – 24 of 24) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/acpi/
H A Dpcihp.c53 #define PCI_RMV_BASE 0x000c macro
285 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu42/qemu-4.2.1/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c macro
318 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu5/qemu-5.2.0/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c macro
353 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c macro
318 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c
319 case PCI_RMV_BASE:
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c macro
319 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu60/qemu-6.0.0/hw/acpi/
H A Dpcihp.c46 #define PCI_RMV_BASE 0x000c macro
414 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu/qemu-6.2.0/hw/acpi/
H A Dpcihp.c47 #define PCI_RMV_BASE 0x000c macro
452 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/acpi/
H A Dpcihp.c47 #define PCI_RMV_BASE 0x000c macro
428 case PCI_RMV_BASE: in pci_read()
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/misc/seabios/seabios-1.14.0/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu/qemu-6.2.0/roms/seabios-hppa/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()
/dports/emulators/qemu/qemu-6.2.0/roms/seabios/src/fw/
H A Dacpi.c262 #define PCI_RMV_BASE 0xae0c macro
407 u32 rmvc_pcrm = inl(PCI_RMV_BASE); in build_ssdt()