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Searched refs:PLL3P (Results 1 – 3 of 3) sorted by relevance

/dports/lang/micropython/micropython-1.17/ports/stm32/
H A Dsystem_stm32.c334 PeriphClkInitStruct.PLL3.PLL3P = MICROPY_HW_CLK_PLL3P; in SystemClock_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_hal_rcc_ex.c1385 …PeriphClkInit->PLL3.PLL3P = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> RCC_PLL3DIVR_P3_Pos)+ … in HAL_RCCEx_GetPeriphCLKConfig()
2800 assert_param(IS_RCC_PLL3P_VALUE(pll3->PLL3P)); in RCCEx_PLL3_Config()
2833 pll3->PLL3P, in RCCEx_PLL3_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_hal_rcc_ex.h87 uint32_t PLL3P; /*!< PLL3P: Division factor for system clock. member