Searched refs:PLL5_CTRL (Results 1 – 3 of 3) sorted by relevance
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-vf610.c | 63 #define PLL5_CTRL (anatop_base + 0xe0) macro
215 …clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_s… in vf610_clocks_init()
223 clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3); in vf610_clocks_init()
231 …clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRA… in vf610_clocks_init()
248 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13); in vf610_clocks_init()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-vf610.c | 63 #define PLL5_CTRL (anatop_base + 0xe0) macro
215 …clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_s… in vf610_clocks_init()
223 clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3); in vf610_clocks_init()
231 …clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRA… in vf610_clocks_init()
248 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13); in vf610_clocks_init()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-vf610.c | 63 #define PLL5_CTRL (anatop_base + 0xe0) macro
215 …clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_s… in vf610_clocks_init()
223 clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3); in vf610_clocks_init()
231 …clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRA… in vf610_clocks_init()
248 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13); in vf610_clocks_init()
|