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Searched refs:PORT_PCI_DATA (Results 1 – 25 of 38) sorted by relevance

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/dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
25 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
31 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
37 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
43 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
49 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
55 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
25 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
31 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
37 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
43 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
49 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
55 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios-hppa/src/hw/
H A Dpci.c16 #define PORT_PCI_DATA 0x0cfc macro
24 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
30 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
36 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
42 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
48 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
54 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
20 outl(val, PORT_PCI_DATA); in pci_config_writel()
26 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
32 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
38 return inl(PORT_PCI_DATA); in pci_config_readl()
44 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
50 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
20 outl(val, PORT_PCI_DATA); in pci_config_writel()
26 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
32 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
38 return inl(PORT_PCI_DATA); in pci_config_readl()
44 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
50 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
25 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
31 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
37 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
43 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
49 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
55 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu42/qemu-4.2.1/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
20 outl(val, PORT_PCI_DATA); in pci_config_writel()
26 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
32 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
38 return inl(PORT_PCI_DATA); in pci_config_readl()
44 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
50 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
25 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
31 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
37 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
43 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
49 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
55 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
20 outl(val, PORT_PCI_DATA); in pci_config_writel()
26 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
32 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
38 return inl(PORT_PCI_DATA); in pci_config_readl()
44 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
50 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
25 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
31 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
37 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
43 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
49 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
55 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
35 outl(val, PORT_PCI_DATA); in pci_config_writel()
45 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
55 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
65 return inl(PORT_PCI_DATA); in pci_config_readl()
75 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
85 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
35 outl(val, PORT_PCI_DATA); in pci_config_writel()
45 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
55 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
65 return inl(PORT_PCI_DATA); in pci_config_readl()
75 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
85 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/misc/seabios/seabios-1.14.0/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
35 outl(val, PORT_PCI_DATA); in pci_config_writel()
45 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
55 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
65 return inl(PORT_PCI_DATA); in pci_config_readl()
75 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
85 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu/qemu-6.2.0/roms/seabios/src/hw/
H A Dpci.c15 #define PORT_PCI_DATA 0x0cfc macro
35 outl(val, PORT_PCI_DATA); in pci_config_writel()
45 outw(val, PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
55 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
65 return inl(PORT_PCI_DATA); in pci_config_readl()
75 return inw(PORT_PCI_DATA + (addr & 2)); in pci_config_readw()
85 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu/qemu-6.2.0/roms/seabios-hppa/src/hw/
H A Dpci.c17 #define PORT_PCI_DATA 0x0cfc macro
40 outl(cpu_to_le32(val), PORT_PCI_DATA); in pci_config_writel()
50 outw(cpu_to_le16(val), PORT_PCI_DATA + (addr & 2)); in pci_config_writew()
60 outb(val, PORT_PCI_DATA + (addr & 3)); in pci_config_writeb()
70 return le32_to_cpu(inl(PORT_PCI_DATA)); in pci_config_readl()
80 return le16_to_cpu(inw(PORT_PCI_DATA + (addr & 2))); in pci_config_readw()
90 return inb(PORT_PCI_DATA + (addr & 3)); in pci_config_readb()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/hppa/
H A Dhppa_hardware.h34 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu42/qemu-4.2.1/hw/hppa/
H A Dhppa_hardware.h37 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu-utils/qemu-4.2.1/hw/hppa/
H A Dhppa_hardware.h37 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/hppa/
H A Dhppa_hardware.h38 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/hppa/
H A Dhppa_hardware.h38 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/parisc/
H A Dhppa_hardware.h39 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu/qemu-6.2.0/hw/hppa/
H A Dhppa_hardware.h39 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/parisc/
H A Dhppa_hardware.h39 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu60/qemu-6.0.0/hw/hppa/
H A Dhppa_hardware.h39 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro
/dports/emulators/qemu5/qemu-5.2.0/hw/hppa/
H A Dhppa_hardware.h39 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) macro

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