1 /* 2 * Copyright (c) 1995 Colin Plumb. All rights reserved. 3 * For licensing and other legal details, see the file legal.c. 4 */ 5 #ifndef PPCASM_H 6 #define PPCASM_H 7 /* 8 * A PowerPC assembler in the C preprocessor. 9 * This assumes that ints are 32 bits, and uses them for the values. 10 * 11 * An assembly-language routine is simply an array of unsigned ints, 12 * initialized with the macros defined here. 13 * 14 * In the PowerPC, a generic function pointer does *not* point to the 15 * first word of code, but to a two (or possibly more) word "transition 16 * vector." The first word of the TV points to the function's code. 17 * The second word is the function's TOC (Table Of Contents) pointer, 18 * which is loaded into r2. The function's global variables are 19 * accessed via the TOC pointed to by r2. TOC pointers are changed, 20 * for example, when a dynamically linked library is called, so the 21 * library can have private global variables. 22 * 23 * Saving r2 and reloading r2 each function call is a hassle that 24 * I'd really rather avoid, since a lot of useful assembly language routines 25 * can be written without global variables at all, so they don't need a TOC 26 * pointer. But I haven't figured out how to persuade CodeWarrior 7 to 27 * generate an intra-TOC call to an array. (CodeWarrior 8 supports 28 * PowerPC asm, which obviates the need to do the cast-to-function-pointer 29 * trick, which obviates the need for cross-TOC calls.) 30 * 31 * The basic PowerPC calling conventions for integers are: 32 * r0 - scratch. May be modified by function calls. 33 * r1 - stack pointer. Must be preserved across function calls. 34 * See IMPORTANT notes on stack frame format below. 35 * This must *ALWAYS*, at every instruction boundary, be 16-byte 36 * aligned and point to a valid stack frame. If a procedure 37 * needs to create a stack frame, the recommended way is to do: 38 * stwu r1,-frame_size(r1) 39 * and on exit, recover with one of: 40 * addi r1,r1,frame_size, OR 41 * lwz r1,0(r1) 42 * r2 - TOC pointer. Points to the current table of contents. 43 * Must be preserved across function calls. 44 * r3 - First argument register and return value register. 45 * Arguments are passed in r3 through r10, and values returned in 46 * r3 through r6, as needed. (Usually only r3 for single word.) 47 * r4-r10 - More argument registers 48 * r11 - Scratch, may be modified by function calls. 49 * On entry to indirect function calls, this points to the 50 * transition vector, and additional words may be loaded 51 * at offsets from it. Some conventions use r12 instead. 52 * r12 - Scratch, may be modified by function calls. 53 * r13-r31 - Callee-save registers, may not be modified by function 54 * calls. 55 * The LR, CTR and XER may be modified by function calls, as may the MQ 56 * register, on those processors for which it is implemented. 57 * CR fields 0, 1, 5, 6 and 7 are scratch and may be modified by function 58 * calls. CR fields 2, 3 and 4 must be preserved across function calls. 59 * 60 * Stack frame format - READ 61 * 62 * r1 points to a stack frame, which must *ALWAYS*, meaning after each and 63 * every instruction, without excpetion, point to a valid 16-byte-aligned 64 * stack frame, defined as follows: 65 * - The 296 bytes below r1 (from -296(r1) to -1(r1)) are the so-called Red 66 * Zone reserved for leaf procedures, which may use it without allocating 67 * a stack frame and without decrementing r1. The size comes from the room 68 * needed to store all the callee-save registers: 19 64-bit integer registers 69 * and 18 64-bit floating-point registers. (18+19)*8 = 296. So any 70 * procedure can save all the registers it needs to save before creating 71 * a stack frame and moving r1. 72 * The bytes at -297(r1) and below may be used by interrupt and exception 73 * handlers *at any time*. Anything placed there may disappear before 74 * the next instruction. 75 * The word at 0(r1) is the previous r1, and so on in a linked list. 76 * This is the minimum needed to be a valid stack frame, but some other 77 * offsets from r1 are preallocated by the calling procedure for the called 78 * procedure's use. These are: 79 * Offset 0: Link to previous stack frame - saved r1, if the called 80 * procedure alters it. 81 * Offset 4: Saved CR, if the called procedure alters the callee-save 82 * fields. There's no important reason to save it here, 83 * but the space is reserved and you might as well use it 84 * for its intended purpose unless you have good reason to 85 * do otherwise. (This may help some debuggers.) 86 * Offset 8: Saved LR, if the called procedure needs to save it for 87 * later function return. Saving the LR here helps a debugger 88 * track the chain of return addresses on the stack. 89 * Note that a called procedure does not need to preserve the 90 * LR for it's caller's sake, but it uually wants to preserve 91 * the value for its own sake until it finishes and it's 92 * time to return. At that point, this is usually loaded 93 * back into the LR and the branch accomplished with BLR. 94 * However, if you want to be preverse, you could load it 95 * into the CTR and use BCTR instead. 96 * Offset 12: Reserved to compiler. I can't find what this is for. 97 * Offset 16: Reserved to compiler. I can't find what this is for. 98 * Offset 20: Saved TOC pointer. In a cross-TOC call, the old TOC (r2) 99 * is saved here before r2 is loaded with the new TOC value. 100 * Again, it's not important to use this slot for this, but 101 * you might as well. 102 * Beginning at offset 24 is the argument area. This area is at least 8 words 103 * (32 bytes; I don't know what happens with 64 bits) long, and may be longer, 104 * up to the length of the longest argument list in a function called by 105 * the function which allocated this stack frame. Generally, arguments 106 * to functions are passed in registers, but if those functions notice 107 * the address of the arguments being taken, the registers are stored 108 * into the space reserved for them in this area and then used from memory. 109 * Additional arguments that will not fit into registers are also stored 110 * here. Variadic functions (like printf) generally start by saving 111 * all the integer argument registers from the "..." onwards to this space. 112 * For that reason, the space must be large enough to store all the argument 113 * registers, even if they're never used. 114 * (It could probably be safely shrunk if you're not calling any variadic 115 * functions, but be careful!) 116 * 117 * Offsets above that are private to the calling function and shouldn't 118 * be messed with. Generally, what appears there is locals, then saved 119 * registers. 120 * 121 * 122 * The floating-point instruction set isn't implemented yet (I'm too 123 * lazy, as I don't need it yet), but for when it is, the register 124 * usage convention is: 125 * FPSCR - Scratch, except for floating point exception enable fields, 126 * which should only be modified by functions defined to do so. 127 * fr0 - scratch 128 * fr1 - first floating point parameter and return value, scratch 129 * fr2 - second floating point parameter and return value (if needed), scratch 130 * fr3 - third floating point parameter and return value (if needed), scratch 131 * fr4 - fourth floating point parameter and return value (if needed), scratch 132 * fr5-fr13 - More floating point argument registers, scratch 133 * fr14-fr31 - Callee-save registers, may not be modified across a function call 134 * 135 * Complex values store the real part in the lower-numberd register of a pair. 136 * When mixing floating-point and integer arguments, reserve space (one register 137 * for single-precision, two for double-precision values) in the integer 138 * argument list for the floating-point values. Those integer registers 139 * generally have undefined values, UNLESS there is no prototype for the call, 140 * in which case they should contain a copy of the floating-point value's 141 * bit pattern to cope with wierd software. 142 * If the floating point arguments go past the end of the integer registers, 143 * they are stored in the argument area as well as being passed in here. 144 * 145 * After the argument area comes the calling function's private storage. 146 * Typically, there are locals, followed by saved GP rgisters, followed 147 * by saved FP registers. 148 * 149 * Suggested instruction for allocating a stack frame: 150 * stwu r1,-frame_size(r1) 151 * Suggested instructions for deallocating a stack frame: 152 * addi r1,r1,frame_size 153 * or 154 * lwz r1,0(r1) 155 * If frame_size is too big, you'll have to load the offset into a temp 156 * register, but be sure that r1 is updated atomically. 157 * 158 * 159 * Basic PowerPC instructions look like this: 160 * 161 * 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 162 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 163 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 164 * | Opcode | | | | | | | | | | | | | | | | | | | | | | | | | | | 165 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 166 * 167 * Branch instructions look like this: 168 * 169 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 170 * | Opcode | Branch offset |A|L| 171 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 172 * 173 * The L, or LK, or Link bit indicates that the return address for the 174 * branch should be copied to the link register (LR). 175 * The A, or AA, or absolute address bit, indicates that the address 176 * of the current instruction (NOTE: not next instruction!) should NOT 177 * be added to the branch offset; it is relative to address 0. 178 * 179 * Conditional branches looks like this: 180 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 181 * | Opcode | BO | BI | Branch offset |A|L| 182 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 183 * 184 * The BI field specifies the condition bit of interest (from the CR). 185 * The BO field specifies what's interesting. You can branch on a 186 * combination of a bit of the condition register and --ctr, the CTR 187 * register. Two bits encode the branch condition to use: 188 * BRANCH IF 189 * 00--- = Bit BI is 0 190 * 01--- = Bit BI is 1 191 * 1z--- = don't care about bit BI (always true) 192 * AND 193 * --00- = --ctr != 0 194 * --01- = --ctr == 0 195 * --1z- = don't decrement ctr (always true) 196 * The last bit us used as a branch prediction bit. If set, it reverses 197 * the usual backward-branch-taken heuristic. 198 * 199 * y = branch prediction bit. z = unused, must be 0 200 * 0000y - branch if --ctr != 0 && BI == 0 201 * don't branch if --ctr == 0 || BI != 0 202 * 0001y - branch if --ctr == 0 && BI == 0 203 * don't branch if --ctr != 0 || BI != 0 204 * 001zy - branch if BI == 0 205 * don't branch if BI != 0 206 * 0100y - branch if --ctr != 0 && BI != 0 207 * don't branch if --ctr == 0 || BI == 0 208 * 0101y - branch if --ctr == 0 && BI != 0 209 * don't branch if --ctr != 0 || BI == 0 210 * 011zy - branch if BI != 0 211 * don't branch if BI == 0 212 * 1z00y - branch if --ctr != 0 213 * don't branch if --ctr == 0 214 * 1z01y - branch if --ctr == 0 215 * don't branch if --ctr != 0 216 * 1z1zz - branch always 217 * If y is 1, the usual branch prediction (usually not taken, taken for 218 * backwards branches with immediate offsets) is reversed. 219 * 220 * Instructions with 2 operands and a 16-bit immediate field look like this: 221 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 222 * | Opcode | D | A | 16-bit immediate value | 223 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 224 * 225 * Now, there are three variations of note. In some instructions, the 16-bit 226 * value is sign-extended. In others, it's zero-extended. These are noted 227 * below as "simm" (signed immediate) and "uimm", respectively. Also, which 228 * field is the destination and which is the source sometimes switches. 229 * Sometimes it's d = a OP imm, and sometimes it's a = s OP imm. In the 230 * latter cases, the "d" field is referred to as "s" ("source" instead of 231 * "destination". These are logical and shift instructions. (Store also 232 * refers to the s register, but that's the source of the value to be stored.) 233 * The assembly mnemonics, however, always lists the destination first, 234 * swapping the order in the instruction if necessary. 235 * Third, quite often, if r0 is specified for the source a, then the constant 236 * value 0 is used instead. Thus, r0 is of limited use - it can be used for 237 * some things, but not all. 238 * 239 * Instructions with three register operands look like this: 240 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 241 * | Opcode | D | A | B | Subopcode |C| 242 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 243 * 244 * For most of the instructions of interest the Opcode is 31 and the subopcode 245 * determines what the instruction does. For a few instructions (mostly loads 246 * and stores), if the A field is 0, the constant 0 is used. The "C" 247 * bit (also known as the "RC" bit) controls whether or not the condition 248 * codes are updated. If it is set (indicated by a "." suffix on the official 249 * PowerPC opcodes, and a "_" suffix on these macros), condition code register 250 * field 0 (for integer instructions; field 1 for floating point) is updated 251 * to reflect the result of the operation. 252 * Some arithmetic instructions use the most significant bit of the subopcode 253 * field as an overflow enable bit (o suffix). 254 * 255 * Then there are the rotate and mask instructions, which have 5 operands, and 256 * fill the subopcode field with 2 more 5-bit fields. See below for them. 257 * 258 * NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE NOTE 259 * These macros fully parenthesize their arguments, but are not themselves 260 * fully parenthesized. They are intended to be used for initializer lists, 261 * and if you want to do tricks with their numeric values, wrap them in 262 * parentheses. 263 */ 264 265 #define PPC_MAJOR(x) ((x)<<26) /* Major opcode (0..63) */ 266 #define PPC_MINOR(x) ((x)<<1) /* Minor opcode (0..1023) */ 267 #define PPC_RC 1 /* Record carry (. suffix, represented as _) */ 268 #define PPC_OE 1024 /* Overflow enable (o suffix) */ 269 #define PPC_DEST(reg) ((reg)<<21) /* Dest register field */ 270 #define PPC_SRCA(reg) ((reg)<<16) /* First source register field */ 271 #define PPC_SRCB(reg) ((reg)<<11) /* Second source register field */ 272 #define PPC_AA 2 /* Branch is absolute, relative to address 0 */ 273 #define PPC_LK 1 /* Branch with link (L suffix) */ 274 275 /* Unconditional branch (dest is 26 bits, +/- 2^25 bytes) */ 276 #define PPC_B(dest) PPC_MAJOR(18)|(((dest)<<2) & 0x03fffffc) 277 #define PPC_BA(dest) PPC_B(dest)|PPC_AA 278 #define PPC_BL(dest) PPC_B(dest)|PPC_LK 279 #define PPC_BLA(dest) PPC_B(dest)|PPC_AA|PPC_LK 280 281 /* Three-operand instructions */ 282 #define PPC_TYPE31(minor,d,a,b) \ 283 PPC_MAJOR(31)|PPC_DEST(d)|PPC_SRCA(a)|PPC_SRCB(b)|PPC_MINOR(minor) 284 #define PPC_ADD(d,a,b) PPC_TYPE31(266,d,a,b) 285 #define PPC_ADD_(d,a,b) PPC_TYPE31(266,d,a,b)|PPC_RC 286 #define PPC_ADDO(d,a,b) PPC_TYPE31(266,d,a,b)|PPC_OE 287 #define PPC_ADDO_(d,a,b) PPC_TYPE31(266,d,a,b)|PPC_OE|PPC_RC 288 #define PPC_ADDC(d,a,b) PPC_TYPE31(10,d,a,b) 289 #define PPC_ADDC_(d,a,b) PPC_TYPE31(10,d,a,b)|PPC_RC 290 #define PPC_ADDCO(d,a,b) PPC_TYPE31(10,d,a,b)|PPC_OE 291 #define PPC_ADDCO_(d,a,b) PPC_TYPE31(10,d,a,b)|PPC_OE|PPC_RC 292 #define PPC_ADDE(d,a,b) PPC_TYPE31(138,d,a,b) 293 #define PPC_ADDE_(d,a,b) PPC_TYPE31(138,d,a,b)|PPC_RC 294 #define PPC_ADDEO(d,a,b) PPC_TYPE31(138,d,a,b)|PPC_OE 295 #define PPC_ADDEO_(d,a,b) PPC_TYPE31(138,d,a,b)|PPC_OE|PPC_RC 296 #define PPC_ADDME(d,a) PPC_TYPE31(234,d,a,0) 297 #define PPC_ADDME_(d,a) PPC_TYPE31(234,d,a,0)|PPC_RC 298 #define PPC_ADDMEO(d,a) PPC_TYPE31(234,d,a,0)|PPC_OE 299 #define PPC_ADDMEO_(d,a) PPC_TYPE31(234,d,a,0)|PPC_OE|PPC_RC 300 #define PPC_ADDZE(d,a) PPC_TYPE31(202,d,a,0) 301 #define PPC_ADDZE_(d,a) PPC_TYPE31(202,d,a,0)|PPC_RC 302 #define PPC_ADDZEO(d,a) PPC_TYPE31(202,d,a,0)|PPC_OE 303 #define PPC_ADDZEO_(d,a) PPC_TYPE31(202,d,a,0)|PPC_OE|PPC_RC 304 #define PPC_AND(a,s,b) PPC_TYPE31(28,s,a,b) 305 #define PPC_AND_(a,s,b) PPC_TYPE31(28,s,a,b)|PPC_RC 306 #define PPC_ANDC(a,s,b) PPC_TYPE31(60,s,a,b) 307 #define PPC_ANDC_(a,s,b) PPC_TYPE31(60,s,a,b)|PPC_RC 308 #define PPC_CMP(cr,a,b) PPC_TYPE31(0,(cr)<<2,a,b) 309 #define PPC_CMPL(cr,a,b) PPC_TYPE31(32,(cr)<<2,a,b) 310 #define PPC_CNTLZW(a,s) PPC_TYPE31(26,s,a,0) 311 #define PPC_CNTLZW_(a,s) PPC_TYPE31(26,s,a,0)|PPC_RC 312 #define PPC_DCBF(a,b) PPC_TYPE31(86,0,a,b) 313 #define PPC_DCBI(a,b) PPC_TYPE31(470,0,a,b) 314 #define PPC_DCBST(a,b) PPC_TYPE31(54,0,a,b) 315 #define PPC_DCBT(a,b) PPC_TYPE31(278,0,a,b) 316 #define PPC_DCBTST(a,b) PPC_TYPE31(246,0,a,b) 317 #define PPC_DCBZ(a,b) PPC_TYPE31(1014,0,a,b) 318 #define PPC_DIVW(d,a,b) PPC_TYPE31(491,d,a,b) 319 #define PPC_DIVW_(d,a,b) PPC_TYPE31(491,d,a,b)|PPC_RC 320 #define PPC_DIVWO(d,a,b) PPC_TYPE31(491,d,a,b)|PPC_OE 321 #define PPC_DIVWO_(d,a,b) PPC_TYPE31(491,d,a,b)|PPC_OE|PPC_RC 322 #define PPC_DIVWU(d,a,b) PPC_TYPE31(459,d,a,b) 323 #define PPC_DIVWU_(d,a,b) PPC_TYPE31(459,d,a,b)|PPC_RC 324 #define PPC_DIVWUO(d,a,b) PPC_TYPE31(459,d,a,b)|PPC_OE 325 #define PPC_DIVWUO_(d,a,b) PPC_TYPE31(459,d,a,b)|PPC_OE|PPC_RC 326 #define PPC_EIEIO() PPC_TYPE31(854,0,0,0) 327 #define PPC_EQV(a,s,b) PPC_TYPE31(284,s,a,b) 328 #define PPC_EQV_(a,s,b) PPC_TYPE31(284,s,a,b)|PPC_RC 329 #define PPC_EXTSB(a,s,b) PPC_TYPE31(954,s,a,b) 330 #define PPC_EXTSB_(a,s,b) PPC_TYPE31(954,s,a,b)|PPC_RC 331 #define PPC_EXTSH(a,s,b) PPC_TYPE31(922,s,a,b) 332 #define PPC_EXTSH_(a,s,b) PPC_TYPE31(922,s,a,b)|PPC_RC 333 #define PPC_ICBI(a,b) PPC_TYPE31(982,0,a,b) 334 #define PPC_ISYNC() PPC_TYPE31(150,0,0,0) 335 #define PPC_LBZUX(d,a,b) PPC_TYPE31(119,d,a,b) 336 #define PPC_LBZX(d,a,b) PPC_TYPE31(87,d,a,b) 337 #define PPC_LHAUX(d,a,b) PPC_TYPE31(375,d,a,b) 338 #define PPC_LHAX(d,a,b) PPC_TYPE31(343,d,a,b) 339 #define PPC_LHBRX(d,a,b) PPC_TYPE31(790,d,a,b) 340 #define PPC_LHZUX(d,a,b) PPC_TYPE31(311,d,a,b) 341 #define PPC_LHZX(d,a,b) PPC_TYPE31(279,d,a,b) 342 #define PPC_LSWI(d,a,nb) PPC_TYPE31(597,d,a,nb) 343 #define PPC_LSWX(d,a,b) PPC_TYPE31(533,d,a,b) 344 #define PPC_LSARX(d,a,b) PPC_TYPE31(20,d,a,b) 345 #define PPC_LSBRX(d,a,b) PPC_TYPE31(534,d,a,b) 346 #define PPC_MCRXR(crd) PPC_TYPE31(512,(crd)<<2,0,0) 347 #define PPC_MFCR(d) PPC_TYPE31(19,d,0,0) 348 #define PPC_MFSPR(d,spr) PPC_TYPE31(339,d,(spr)&31,(spr)>>5) 349 #define PPC_MFTB(d) PPC_TYPE31(371,d,12,8) 350 #define PPC_MFTBU(d) PPC_TYPE31(371,d,13,8) 351 #define PPC_MTCRF(mask,s) PPC_TYPE31(144,s,0,(mask)&0xff) 352 #define PPC_MTSPR(s,spr) PPC_TYPE31(467,s,(spr)&31,(spr)>>5) 353 #define PPC_MULHW(d,a,b) PPC_TYPE31(75,d,a,b) 354 #define PPC_MULHW_(d,a,b) PPC_TYPE31(75,d,a,b)|PPC_RC 355 #define PPC_MULHWU(d,a,b) PPC_TYPE31(11,d,a,b) 356 #define PPC_MULHWU_(d,a,b) PPC_TYPE31(11,d,a,b)|PPC_RC 357 #define PPC_MULLW(d,a,b) PPC_TYPE31(235,d,a,b) 358 #define PPC_MULLW_(d,a,b) PPC_TYPE31(235,d,a,b)|PPC_RC 359 #define PPC_MULLWO(d,a,b) PPC_TYPE31(235,d,a,b)|PPC_OE 360 #define PPC_MULLWO_(d,a,b) PPC_TYPE31(235,d,a,b)|PPC_OE|PPC_RC 361 #define PPC_NAND(a,s,b) PPC_TYPE31(476,s,a,b) 362 #define PPC_NAND_(a,s,b) PPC_TYPE31(476,s,a,b)|PPC_RC 363 #define PPC_NEG(d,a) PPC_TYPE31(104,d,a,b) 364 #define PPC_NEG_(d,a) PPC_TYPE31(104,d,a,b)|PPC_RC 365 #define PPC_NEGO(d,a) PPC_TYPE31(104,d,a,b)|PPC_OE 366 #define PPC_NEGO_(d,a) PPC_TYPE31(104,d,a,b)|PPC_OE|PPC_RC 367 #define PPC_NOR(a,s,b) PPC_TYPE31(124,s,a,b) 368 #define PPC_NOR_(a,s,b) PPC_TYPE31(124,s,a,b)|PPC_RC 369 #define PPC_OR(a,s,b) PPC_TYPE31(444,s,a,b) 370 #define PPC_OR_(a,s,b) PPC_TYPE31(444,s,a,b)|PPC_RC 371 #define PPC_ORC(a,s,b) PPC_TYPE31(412,s,a,b) 372 #define PPC_ORC_(a,s,b) PPC_TYPE31(412,s,a,b)|PPC_RC 373 #define PPC_SLW(a,s,b) PPC_TYPE31(24,s,a,b) 374 #define PPC_SLW_(a,s,b) PPC_TYPE31(24,s,a,b)|PPC_RC 375 #define PPC_SRAW(a,s,b) PPC_TYPE31(792,s,a,b) 376 #define PPC_SRAW_(a,s,b) PPC_TYPE31(792,s,a,b)|PPC_RC 377 #define PPC_SRAWI(a,s,sh) PPC_TYPE31(824,s,a,sh) 378 #define PPC_SRAWI_(a,s,sh) PPC_TYPE31(824,s,a,sh)|PPC_RC 379 #define PPC_SRW(a,s,b) PPC_TYPE31(536,s,a,b) 380 #define PPC_SRW_(a,s,b) PPC_TYPE31(536,s,a,b)|PPC_RC 381 #define PPC_STBUX(s,a,b) PPC_TYPE31(247,s,a,b) 382 #define PPC_STBX(s,a,b) PPC_TYPE31(215,s,a,b) 383 #define PPC_STHBRX(s,a,b) PPC_TYPE31(918,s,a,b) 384 #define PPC_STHUX(s,a,b) PPC_TYPE31(439,s,a,b) 385 #define PPC_STHX(s,a,b) PPC_TYPE31(407,s,a,b) 386 #define PPC_STSWI(s,a,nb) PPC_TYPE31(725,s,a,nb) 387 #define PPC_STSWX(s,a,b) PPC_TYPE31(661,s,a,b) 388 #define PPC_STWBRX(s,a,b) PPC_TYPE31(662,s,a,b) 389 #define PPC_STWCX_(s,a,b) PPC_TYPE31(150,s,a,b)|PPC_RC 390 #define PPC_STWUX(s,a,b) PPC_TYPE31(183,s,a,b) 391 #define PPC_STWX(s,a,b) PPC_TYPE31(151,s,a,b) 392 #define PPC_SUBF(d,a,b) PPC_TYPE31(40,d,a,b) 393 #define PPC_SUBF_(d,a,b) PPC_TYPE31(40,d,a,b)|PPC_RC 394 #define PPC_SUBFO(d,a,b) PPC_TYPE31(40,d,a,b)|PPC_OE 395 #define PPC_SUBFO_(d,a,b) PPC_TYPE31(40,d,a,b)|PPC_OE|PPC_RC 396 #define PPC_SUB(d,b,a) PPC_SUBF(d,a,b) 397 #define PPC_SUB_(d,b,a) PPC_SUBF_(d,a,b) 398 #define PPC_SUBO(d,b,a) PPC_SUBFO(d,a,b) 399 #define PPC_SUBO_(d,b,a) PPC_SUBFO_(d,a,b) 400 #define PPC_SUBFC(d,a,b) PPC_TYPE31(8,d,a,b) 401 #define PPC_SUBFC_(d,a,b) PPC_TYPE31(8,d,a,b)|PPC_RC 402 #define PPC_SUBFCO(d,a,b) PPC_TYPE31(8,d,a,b)|PPC_OE 403 #define PPC_SUBFCO_(d,a,b) PPC_TYPE31(8,d,a,b)|PPC_OE|PPC_RC 404 #define PPC_SUBFE(d,a,b) PPC_TYPE31(136,d,a,b) 405 #define PPC_SUBFE_(d,a,b) PPC_TYPE31(136,d,a,b)|PPC_RC 406 #define PPC_SUBFEO(d,a,b) PPC_TYPE31(136,d,a,b)|PPC_OE 407 #define PPC_SUBFEO_(d,a,b) PPC_TYPE31(136,d,a,b)|PPC_OE|PPC_RC 408 #define PPC_SUBFME(d,a) PPC_TYPE31(232,d,a,0) 409 #define PPC_SUBFME_(d,a) PPC_TYPE31(232,d,a,0)|PPC_RC 410 #define PPC_SUBFMEO(d,a) PPC_TYPE31(232,d,a,0)|PPC_OE 411 #define PPC_SUBFMEO_(d,a) PPC_TYPE31(232,d,a,0)|PPC_OE|PPC_RC 412 #define PPC_SUBFZE(d,a) PPC_TYPE31(200,d,a,0) 413 #define PPC_SUBFZE_(d,a) PPC_TYPE31(200,d,a,0)|PPC_RC 414 #define PPC_SUBFZEO(d,a) PPC_TYPE31(200,d,a,0)|PPC_OE 415 #define PPC_SUBFZEO_(d,a) PPC_TYPE31(200,d,a,0)|PPC_OE|PPC_RC 416 #define PPC_SYNC() PPC_TYPE31(598,0,0,0) 417 #define PPC_TW(to,a,b) PPC_TYPE31(4,to,a,b) 418 #define PPC_XOR(a,s,b) PPC_TYPE31(316,s,a,b) 419 420 /* Immediate-operand instructions. Take a 16-bit immediate operand */ 421 #define PPC_IMM(major,d,a,imm) \ 422 PPC_MAJOR(major)|PPC_DEST(d)|PPC_SRCA(a)|((imm)&0xffff) 423 /* Trap word immediate */ 424 #define PPV_TWI(to,a,simm) PPC_IMM(3,to,a,simm) 425 /* Integer arithmetic */ 426 #define PPC_MULLI(d,a,simm) PPC_IMM(7,d,a,simm) 427 #define PPC_SUBFIC(s,a,simm) PPC_IMM(8,s,a,simm) 428 #define PPC_CMPLI(cr,a,uimm) PPC_IMM(10,(cr)<<2,a,uimm) 429 #define PPC_CMPI(cr,a,simm) PPC_IMM(11,(cr)<<2,a,simm) 430 #define PPC_ADDIC(d,a,simm) PPC_IMM(12,d,a,simm) 431 #define PPC_ADDIC_(d,a,simm) PPC_IMM(13,d,a,simm) 432 #define PPC_ADDI(d,a,simm) PPC_IMM(14,d,a,simm) 433 #define PPC_ADDIS(d,a,simm) PPC_IMM(15,d,a,simm) 434 435 /* Conditional branch (dest is 16 bits, +/- 2^15 bytes) */ 436 #define PPC_BC(bo,bi,dest) PPC_IMM(16,bo,bi,((dest)<<2)&0xfffc) 437 #define PPC_BCA(bo,bi,dest) PPC_BC(bo,bi,dest)|PPC_AA 438 #define PPC_BCL(bo,bi,dest) PPC_BC(bo,bi,dest)|PPC_LK 439 #define PPC_BCLA(bo,bi,dest) PPC_BC(bo,bi,dest)|PPC_AA|PPC_LK 440 441 /* Logical operations */ 442 #define PPC_ORI(a,s,uimm) PPC_IMM(24,s,a,uimm) 443 #define PPC_ORIS(a,s,uimm) PPC_IMM(25,s,a,uimm) 444 #define PPC_XORI(a,s,uimm) PPC_IMM(26,s,a,uimm) 445 #define PPC_XORIS(a,s,uimm) PPC_IMM(27,s,a,uimm) 446 #define PPC_ANDI_(a,s,uimm) PPC_IMM(28,s,a,uimm) 447 #define PPC_ANDIS(a,s,uimm) PPC_IMM(29,s,a,uimm) 448 449 /* Load/store */ 450 #define PPC_LWZ(d,a,simm) PPC_IMM(32,d,a,simm) 451 #define PPC_LWZU(d,a,simm) PPC_IMM(33,d,a,simm) 452 #define PPC_LBZ(d,a,simm) PPC_IMM(34,d,a,simm) 453 #define PPC_LBZU(d,a,simm) PPC_IMM(35,d,a,simm) 454 #define PPC_STW(s,a,simm) PPC_IMM(36,s,a,simm) 455 #define PPC_STWU(s,a,simm) PPC_IMM(37,s,a,simm) 456 #define PPC_STB(s,a,simm) PPC_IMM(38,s,a,simm) 457 #define PPC_STBU(s,a,simm) PPC_IMM(39,s,a,simm) 458 #define PPC_LHZ(d,a,simm) PPC_IMM(40,d,a,simm) 459 #define PPC_LHZU(d,a,simm) PPC_IMM(41,d,a,simm) 460 #define PPC_LHA(d,a,simm) PPC_IMM(42,d,a,simm) 461 #define PPC_STH(s,a,simm) PPC_IMM(44,s,a,simm) 462 #define PPC_STHU(s,a,simm) PPC_IMM(45,s,a,simm) 463 #define PPC_LHAU(d,a,simm) PPC_IMM(43,d,a,simm) 464 #define PPC_LMW(d,a,simm) PPC_IMM(46,d,a,simm) 465 #define PPC_STMW(s,a,simm) PPC_IMM(47,s,a,simm) 466 467 /* Major number = 19 - condition register operations. d, a and b are CR bits */ 468 #define PPC_TYPE19(minor,d,a,b) \ 469 PPC_MAJOR(19)|PPC_DEST(d)|PPC_SRCA(a)|PPC_SRCB(b)|PPC_MINOR(minor) 470 #define PPC_MCRF(d,s) PPC_TYPE19(0,(d)<<2,(s)<<2,0) 471 #define PPC_CRNOR(d,a,b) PPC_TYPE19(33,d,a,b) 472 #define PPC_CRANDC(d,a,b) PPC_TYPE19(129,d,a,b) 473 #define PPC_CRXOR(d,a,b) PPC_TYPE19(193,d,a,b) 474 #define PPC_CRNAND(d,a,b) PPC_TYPE19(225,d,a,b) 475 #define PPC_CRAND(d,a,b) PPC_TYPE19(257,d,a,b) 476 #define PPC_CREQV(d,a,b) PPC_TYPE19(289,d,a,b) 477 #define PPC_CRORC(d,a,b) PPC_TYPE19(417,d,a,b) 478 #define PPC_CROR(d,a,b) PPC_TYPE19(449,d,a,b) 479 480 /* Indirect conditional branch */ 481 #define PPC_BCLR(bo,bi) PPC_TYPE19(16,bo,bi,0) 482 #define PPC_BCLRL(bo,bi) PPC_TYPE19(16,bo,bi,0)|PPC_LK 483 #define PPC_BCCTR(bo,bi) PPC_TYPE19(528,bo,bi,0) 484 #define PPC_BCCTRL(bo,bi) PPC_TYPE19(528,bo,bi,0)|PPC_LK 485 #define PPC_BLR() PPC_BCLR(20,31) 486 #define PPC_BCTR() PPC_BCCTR(20,31) 487 488 /* Other */ 489 #define PPC_RLWIMI(a,s,sh,mb,me) \ 490 PPC_MAJOR(20)|PPC_DEST(s)|PPC_SRCA(A)|PPC_SRCB(sh)|(mb)<<6|(me)<<1 491 #define PPC_RLWIMI_(a,s,sh,mb,me) PPC_RLWIMI(a,s,sh,mb,me)|PPC_RC 492 #define PPC_RLWINM(a,s,sh,mb,me) \ 493 PPC_MAJOR(21)|PPC_DEST(s)|PPC_SRCA(A)|PPC_SRCB(sh)|(mb)<<6|(me)<<1 494 #define PPC_RLWINM_(a,s,sh,mb,me) PPC_RLWINM(a,s,sh,mb,me)|PPC_RC 495 #define PPC_RLWNM(a,s,b,mb,me) \ 496 PPC_MAJOR(23)|PPC_DEST(s)|PPC_SRCA(A)|PPC_SRCB(b)|(mb)<<6|(me)<<1 497 #define PPC_RLWNM_(a,s,b,mb,me) PPC_RLWNM(a,s,b,mb,me)|PPC_RC 498 499 #define PPC_SC() PPC_MAJOR(17)|2 500 /* Major number = 63 Floating-point operations (not implemented for now) */ 501 502 /* Simplified Mnemonics */ 503 /* Fabricate immediate subtract out of add negative */ 504 #define PPC_SUBI(d,a,simm) PPC_ADDI(d,a,-(simm)) 505 #define PPC_SUBIS(d,a,simm) PPC_ADDIS(d,a,-(simm)) 506 #define PPC_SUBIC(d,a,simm) PPC_ADDIC(d,a,-(simm)) 507 #define PPC_SUBIC_(d,a,simm) PPC_ADDIC_(d,a,-(simm)) 508 /* Fabricate subtract out of subtract from */ 509 #define PPC_SUBC(d,b,a) PPC_SUBFC(d,a,b) 510 #define PPC_SUBC_(d,b,a) PPC_SUBFC_(d,a,b) 511 #define PPC_SUBCO(d,b,a) PPC_SUBFCO(d,a,b) 512 #define PPC_SUBCO_(d,b,a) PPC_SUBFCO_(d,a,b) 513 /* Messy compare bits omitted */ 514 /* Shift and rotate omitted */ 515 /* Branch coding omitted */ 516 #define PPC_CRSET(d) PPC_CREQV(d,d,d) 517 #define PPC_CRCLR(d) PPC_CRXOR(d,d,d) 518 #define PPC_CRMOVE(d,s) PPC_CROR(d,s,s) 519 #define PPC_CRNOT(d,s) PPC_CRNOR(d,s,s) 520 /* Trap menmonics omitted */ 521 /* Menmonics for user-accessible SPRs */ 522 #define PPC_MFXER(d) PPC_MFSPR(d,1) 523 #define PPC_MFLR(d) PPC_MFSPR(d,8) 524 #define PPC_MFCTR(d) PPC_MFSPR(d,9) 525 #define PPC_MTXER(s) PPC_MTSPR(s,1) 526 #define PPC_MTLR(s) PPC_MTSPR(s,8) 527 #define PPC_MTCTR(s) PPC_MTSPR(s,9) 528 /* Recommended mnemonics */ 529 #define PPC_NOP() PPC_ORI(0,0,0) 530 #define PPC_LI(d,simm) PPC_ADDI(d,0,simm) 531 #define PPC_LIS(d,simm) PPC_ADDIS(d,0,simm) 532 #define PPC_LA(d,a,simm) PPC_ADDI(d,a,simm) 533 #define PPC_MR(d,s) PPC_OR(d,s,s) 534 #define PPC_NOT(d,s) PPC_NOR(d,s,s) 535 #define PPC_MTCR(s) PPC_MTCRF(0xff,s) 536 537 #endif /* PPCASM_H */ 538 539 /* 45678901234567890123456789012345678901234567890123456789012345678901234567 */ 540