| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/loongson32/common/ |
| H A D | time.c | 47 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_pwmtimer_restart()
131 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_periodic()
140 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_tick_resume()
149 __raw_writel(__raw_readl(timer_reg_base + PWM_CTRL) & ~CNT_EN, in ls1x_clockevent_set_state_shutdown()
150 timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_shutdown()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/loongson32/common/ |
| H A D | time.c | 47 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_pwmtimer_restart()
131 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_periodic()
140 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_tick_resume()
149 __raw_writel(__raw_readl(timer_reg_base + PWM_CTRL) & ~CNT_EN, in ls1x_clockevent_set_state_shutdown()
150 timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_shutdown()
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/loongson32/common/ |
| H A D | time.c | 47 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_pwmtimer_restart()
131 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_periodic()
140 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_tick_resume()
149 __raw_writel(__raw_readl(timer_reg_base + PWM_CTRL) & ~CNT_EN, in ls1x_clockevent_set_state_shutdown()
150 timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_shutdown()
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| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/pwm/ |
| H A D | pwm.c | 73 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in disable_pwms()
77 mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE); in disable_pwms()
89 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in enable_pwms()
92 mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE); in enable_pwms()
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| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/pwm/ |
| H A D | pwm.c | 73 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in disable_pwms()
77 mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE); in disable_pwms()
89 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in enable_pwms()
92 mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE); in enable_pwms()
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| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/pwm/ |
| H A D | pwm.c | 73 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in disable_pwms()
77 mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE); in disable_pwms()
89 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in enable_pwms()
92 mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE); in enable_pwms()
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| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/pwm/ |
| H A D | pwm.c | 73 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in disable_pwms()
77 mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE); in disable_pwms()
89 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in enable_pwms()
92 mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE); in enable_pwms()
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| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/pwm/ |
| H A D | pwm.c | 73 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in disable_pwms()
77 mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE); in disable_pwms()
89 val = mmio_read_32(PWM_BASE + PWM_CTRL(i)); in enable_pwms()
92 mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE); in enable_pwms()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/pwm/ |
| H A D | pwm-mxs.c | 21 #define PWM_CTRL 0x0 macro
69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()
108 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); in mxs_pwm_apply()
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| H A D | pwm-brcmstb.c | 22 #define PWM_CTRL 0x00 macro
191 value = brcmstb_pwm_readl(p, PWM_CTRL); in brcmstb_pwm_enable_set()
201 brcmstb_pwm_writel(p, value, PWM_CTRL); in brcmstb_pwm_enable_set()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pwm/ |
| H A D | pwm-mxs.c | 21 #define PWM_CTRL 0x0 macro
69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()
108 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); in mxs_pwm_apply()
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| H A D | pwm-brcmstb.c | 22 #define PWM_CTRL 0x00 macro
191 value = brcmstb_pwm_readl(p, PWM_CTRL); in brcmstb_pwm_enable_set()
201 brcmstb_pwm_writel(p, value, PWM_CTRL); in brcmstb_pwm_enable_set()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pwm/ |
| H A D | pwm-mxs.c | 21 #define PWM_CTRL 0x0 macro
69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()
108 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); in mxs_pwm_apply()
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| H A D | pwm-brcmstb.c | 22 #define PWM_CTRL 0x00 macro
191 value = brcmstb_pwm_readl(p, PWM_CTRL); in brcmstb_pwm_enable_set()
201 brcmstb_pwm_writel(p, value, PWM_CTRL); in brcmstb_pwm_enable_set()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/include/asm/mach-loongson32/ |
| H A D | regs-pwm.h | 15 #define PWM_CTRL 0xc macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/include/asm/mach-loongson32/ |
| H A D | regs-pwm.h | 15 #define PWM_CTRL 0xc macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/include/asm/mach-loongson32/ |
| H A D | regs-pwm.h | 15 #define PWM_CTRL 0xc macro
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| /dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/ |
| H A D | pwm.h | 77 #define PWM_CTRL PWM_pointer->pwm_ctrl macro
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| /dports/devel/msp430-debug-stack/msp430-debug-stack-3.15.0.1/Bios/src/hil/msp_fet/ |
| H A D | arch.h | 85 unsigned char* PWM_CTRL; member
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| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.h | 228 #define PWM_CTRL(n) (0x000c + 0x10 * (n)) macro
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| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.h | 228 #define PWM_CTRL(n) (0x000c + 0x10 * (n)) macro
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| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.h | 228 #define PWM_CTRL(n) (0x000c + 0x10 * (n)) macro
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| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.h | 228 #define PWM_CTRL(n) (0x000c + 0x10 * (n)) macro
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| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.h | 228 #define PWM_CTRL(n) (0x000c + 0x10 * (n)) macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf518/ |
| H A D | BF512_def.h | 489 #define PWM_CTRL 0xFFC03700 /* PWM Control Register */ macro
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