| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 827 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
831 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
833 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
834 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
856 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
863 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 786 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
790 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
792 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
793 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ANDN2_B64), PrevMaskedReg) in buildMergeLaneMasks()
815 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
822 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 839 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
843 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
845 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
846 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
868 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
875 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 841 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
845 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
847 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
848 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
870 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
877 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 836 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
840 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
842 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
843 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
865 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
872 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0;
841 PrevMaskedReg = PrevReg;
843 PrevMaskedReg = createLaneMaskReg(*MF);
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg)
866 .addReg(PrevMaskedReg);
873 .addReg(PrevMaskedReg)
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
841 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
843 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
866 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
873 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 829 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
833 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
835 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
836 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
858 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
865 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 841 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
845 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
847 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
848 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
870 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
877 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
841 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
843 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
866 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
873 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 836 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
840 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
842 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
843 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
865 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
872 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
841 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
843 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
866 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
873 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
841 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
843 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
866 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
873 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 836 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
840 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
842 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
843 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
865 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
872 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 829 unsigned PrevMaskedReg = 0; in buildMergeLaneMasks() local
833 PrevMaskedReg = PrevReg; in buildMergeLaneMasks()
835 PrevMaskedReg = createLaneMaskReg(*MF); in buildMergeLaneMasks()
836 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg) in buildMergeLaneMasks()
858 .addReg(PrevMaskedReg); in buildMergeLaneMasks()
865 .addReg(PrevMaskedReg) in buildMergeLaneMasks()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.cpp | 837 unsigned PrevMaskedReg = 0;
841 PrevMaskedReg = PrevReg;
843 PrevMaskedReg = createLaneMaskReg(*MF);
844 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg)
866 .addReg(PrevMaskedReg);
873 .addReg(PrevMaskedReg) in getDataRegClass()
|