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Searched refs:RADEON_SPLL_RESET (Results 1 – 9 of 9) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_clocks.c412 tmp |= RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
438 tmp &= ~RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1656 # define RADEON_SPLL_RESET (1 << 1) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c417 tmp |= RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
443 tmp &= ~RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1656 # define RADEON_SPLL_RESET (1 << 1) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c417 tmp |= RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
443 tmp &= ~RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1656 # define RADEON_SPLL_RESET (1 << 1) macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c417 tmp |= RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
443 tmp &= ~RADEON_SPLL_RESET; in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1656 # define RADEON_SPLL_RESET (1 << 1) macro
/dports/x11-drivers/xf86-video-ati/xf86-video-ati-19.1.0/src/
H A Dradeon_reg.h302 # define RADEON_SPLL_RESET (1 << 1) macro